2021-08-30 02:14:06 +00:00
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#ifndef __VB_H__
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#define __VB_H__
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#ifdef __cplusplus
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extern "C" {
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#endif
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#ifndef VBAPI
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#define VBAPI extern
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#endif
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/* Header includes */
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#include <stddef.h>
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#include <stdint.h>
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/********************************* Constants *********************************/
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2021-09-02 00:16:22 +00:00
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/* Memory access types */
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2021-09-19 01:31:40 +00:00
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#define VB_CANCEL -1
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#define VB_S8 0
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#define VB_U8 1
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#define VB_S16 2
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#define VB_U16 3
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#define VB_S32 4
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2021-08-30 02:14:06 +00:00
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/* System register IDs */
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#define VB_ADTRE 25
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#define VB_CHCW 24
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#define VB_ECR 4
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#define VB_EIPC 0
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#define VB_EIPSW 1
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#define VB_FEPC 2
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#define VB_FEPSW 3
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#define VB_PIR 6
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#define VB_PSW 5
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#define VB_TKCW 7
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2021-09-02 00:16:22 +00:00
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/* PC types */
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#define VB_PC 0
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#define VB_PC_FROM 1
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#define VB_PC_TO 2
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2021-09-30 17:33:55 +00:00
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/* Breakpoint callback types */
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#define VB_ONEXCEPTION 0
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#define VB_ONEXECUTE 1
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#define VB_ONFETCH 2
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#define VB_ONREAD 3
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#define VB_ONWRITE 4
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2021-08-30 02:14:06 +00:00
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/*********************************** Types ***********************************/
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2021-09-19 01:31:40 +00:00
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/* Forward references */
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2021-08-30 02:14:06 +00:00
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typedef struct VB VB;
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2021-09-19 01:31:40 +00:00
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/* Memory access */
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typedef struct {
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uint32_t address; /* Bus address being accessed */
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uint32_t clocks; /* Number of clocks required to complete */
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int32_t value; /* Value read (callback's responsibility) or to write */
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int8_t type; /* Data type of value */
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} VB_ACCESS;
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/* CPU instruction */
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typedef struct {
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/* Public fields */
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uint32_t address; /* Bus address */
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uint16_t bits[2]; /* Binary instruction code */
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uint8_t size; /* Size in bytes of the instruction */
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/* Implementation fields */
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int32_t aux[2]; /* Auxiliary storage for CAXI and bit strings */
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uint8_t id; /* Internal operation ID */
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} VB_INSTRUCTION;
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/* Breakpoint callbacks */
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typedef int (*VB_EXCEPTIONPROC)(VB *, uint16_t);
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typedef int (*VB_EXECUTEPROC )(VB *, VB_INSTRUCTION *);
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typedef int (*VB_FETCHPROC )(VB *, int, VB_ACCESS *);
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typedef int (*VB_READPROC )(VB *, VB_ACCESS *);
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typedef int (*VB_WRITEPROC )(VB *, VB_ACCESS *);
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/* Simulation state */
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2021-08-30 02:14:06 +00:00
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struct VB {
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/* Game pak */
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struct {
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uint8_t *rom; /* Active ROM buffer */
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uint32_t romSize; /* Size of ROM data */
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uint8_t *sram; /* Active SRAM buffer */
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uint32_t sramSize; /* Size of SRAM data */
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} cart;
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/* CPU */
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struct {
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/* System registers */
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uint32_t adtre; /* Address trap register for execution */
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uint32_t eipc; /* Exception/Interrupt PC */
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uint32_t eipsw; /* Exception/Interrupt PSW */
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uint32_t fepc; /* Fatal error PC */
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uint32_t fepsw; /* Fatal error PSW */
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uint32_t sr29; /* Unknown system register */
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uint32_t sr31; /* Unknown system register */
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/* Cache control word */
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struct {
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int8_t ice; /* Instruction cache enable */
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} chcw;
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/* Exception cause register */
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struct {
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uint16_t eicc; /* Exception/interrupt cause code */
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uint16_t fecc; /* Fatal error cause code */
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} ecr;
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/* Program status word */
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struct {
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int8_t ae; /* Address trap enable */
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int8_t cy; /* Carry */
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int8_t ep; /* Exception pending */
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int8_t fiv; /* Floating invalid */
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int8_t fov; /* Floating overflow */
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int8_t fpr; /* Floating precision */
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int8_t fro; /* Floating reserved operand */
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int8_t fud; /* Floating underflow */
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int8_t fzd; /* Floating zero divide */
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int8_t i; /* Interrupt level */
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int8_t id; /* Interrupt disable */
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int8_t np; /* NMI pending */
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int8_t ov; /* Overflow */
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int8_t s; /* Sign */
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int8_t z; /* Zero */
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} psw;
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/* Other registers */
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uint32_t pc; /* Program counter */
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int32_t program[32]; /* program registers */
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/* Other fields */
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2021-09-19 01:31:40 +00:00
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VB_ACCESS access; /* Memory access descriptor */
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VB_INSTRUCTION inst; /* Instruction descriptor */
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uint8_t irq[5]; /* Interrupt request lines */
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2021-09-30 17:33:55 +00:00
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uint8_t busWait; /* Memory access counter */
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2021-09-19 01:31:40 +00:00
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uint16_t causeCode; /* Exception cause code */
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uint32_t clocks; /* Clocks until next action */
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int16_t fetch; /* Index of fetch unit */
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uint8_t state; /* Operations state */
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uint8_t substring; /* A bit string operation is in progress */
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2021-08-30 02:14:06 +00:00
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} cpu;
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2021-09-19 01:31:40 +00:00
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/* Breakpoint callbacks */
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VB_EXCEPTIONPROC onException; /* CPU exception */
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VB_EXECUTEPROC onExecute; /* Instruction execute */
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VB_FETCHPROC onFetch; /* Instruction fetch */
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VB_READPROC onRead; /* Memory read */
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VB_WRITEPROC onWrite; /* Memory write */
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2021-08-30 02:14:06 +00:00
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/* Other fields */
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2021-09-19 01:31:40 +00:00
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VB *peer; /* Communications peer */
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uint8_t wram[0x10000]; /* Main memory */
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};
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2022-04-15 01:51:09 +00:00
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/******************************* API Commands ********************************/
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VBAPI void vbConnect (VB *sim1, VB *sim2);
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VBAPI int vbEmulate (VB *sim, uint32_t *clocks);
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VBAPI int vbEmulateMulti (VB **sims, int count, uint32_t *clocks);
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VBAPI void* vbGetCallback (VB *sim, int type);
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VBAPI uint32_t vbGetProgramCounter (VB *sim);
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VBAPI int32_t vbGetProgramRegister (VB *sim, int id);
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VBAPI void* vbGetROM (VB *sim, uint32_t *size);
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VBAPI void* vbGetSRAM (VB *sim, uint32_t *size);
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VBAPI uint32_t vbGetSystemRegister (VB *sim, int id);
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VBAPI void vbInit (VB *sim);
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VBAPI int32_t vbRead (VB *sim, uint32_t address, int type, int debug);
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VBAPI void vbReset (VB *sim);
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2022-04-21 03:37:05 +00:00
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VBAPI void* vbSetCallback (VB *sim, int type, void *callback);
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2022-04-15 01:51:09 +00:00
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VBAPI uint32_t vbSetProgramCounter (VB *sim, uint32_t value);
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VBAPI int32_t vbSetProgramRegister (VB *sim, int id, int32_t value);
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VBAPI int vbSetROM (VB *sim, void *rom, uint32_t size);
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VBAPI int vbSetSRAM (VB *sim, void *sram, uint32_t size);
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VBAPI uint32_t vbSetSystemRegister (VB *sim, int id, uint32_t value);
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VBAPI void vbWrite (VB *sim, uint32_t address, int type, int32_t value, int debug);
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2021-08-30 02:14:06 +00:00
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#ifdef __cplusplus
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}
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#endif
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#endif /* __VB_H__ */
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2023-03-08 16:42:27 +00:00
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