CPU bug fixes
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5f563e6cac
commit
7c25a4ac93
26
core/cpu.c
26
core/cpu.c
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@ -529,8 +529,7 @@ static uint32_t cpuSetSystemRegister(VB*sim,
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}
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}
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/* Addition common processing */
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/* Addition common processing */
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static int32_t cpuAdd(VB *sim, int32_t b) {
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static int32_t cpuAdd(VB *sim, int32_t a, int32_t b) {
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int32_t a = cpuGetReg2(sim);
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int32_t c = a + b;
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int32_t c = a + b;
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sim->cpu.psw.cy = (uint32_t) c < (uint32_t) a;
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sim->cpu.psw.cy = (uint32_t) c < (uint32_t) a;
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sim->cpu.psw.ov = (~(a ^ b) & (a ^ c)) < 0;
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sim->cpu.psw.ov = (~(a ^ b) & (a ^ c)) < 0;
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@ -659,8 +658,7 @@ static int32_t cpuShiftRight(VB *sim, int32_t b) {
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}
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}
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/* Subtraction common processing */
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/* Subtraction common processing */
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static int32_t cpuSubtract(VB *sim, int32_t b) {
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static int32_t cpuSubtract(VB *sim, int32_t a, int32_t b) {
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int32_t a = cpuGetReg2(sim);
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int32_t c = a - b;
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int32_t c = a - b;
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sim->cpu.psw.cy = (uint32_t) a < (uint32_t) b;
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sim->cpu.psw.cy = (uint32_t) a < (uint32_t) b;
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sim->cpu.psw.ov = ((a ^ b) & (a ^ c)) < 0;
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sim->cpu.psw.ov = ((a ^ b) & (a ^ c)) < 0;
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@ -735,13 +733,13 @@ static int cpuST_OUT(VB *sim, int type) {
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/* ADD immediate */
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/* ADD immediate */
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static void cpuADDImm(VB *sim) {
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static void cpuADDImm(VB *sim) {
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cpuSetReg2(sim, cpuAdd(sim, cpuGetImm5S(sim)));
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cpuSetReg2(sim, cpuAdd(sim, cpuGetReg2(sim), cpuGetImm5S(sim)));
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cpuAdvance(sim, cpuClocks(1));
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cpuAdvance(sim, cpuClocks(1));
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}
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}
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/* ADD register */
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/* ADD register */
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static void cpuADDReg(VB *sim) {
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static void cpuADDReg(VB *sim) {
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cpuSetReg2(sim, cpuAdd(sim, cpuGetReg1(sim)));
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cpuSetReg2(sim, cpuAdd(sim, cpuGetReg2(sim), cpuGetReg1(sim)));
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cpuAdvance(sim, cpuClocks(1));
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cpuAdvance(sim, cpuClocks(1));
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}
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}
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@ -762,7 +760,7 @@ static void cpuADDF_S(VB *sim) {
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/* ADDI */
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/* ADDI */
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static void cpuADDI(VB *sim) {
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static void cpuADDI(VB *sim) {
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cpuSetReg2(sim, cpuAdd(sim, cpuGetImm16S(sim)));
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cpuSetReg2(sim, cpuAdd(sim, cpuGetReg1(sim), cpuGetImm16S(sim)));
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cpuAdvance(sim, cpuClocks(1));
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cpuAdvance(sim, cpuClocks(1));
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}
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}
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@ -774,7 +772,7 @@ static void cpuAND(VB *sim) {
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/* ANDI */
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/* ANDI */
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static void cpuANDI(VB *sim) {
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static void cpuANDI(VB *sim) {
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cpuSetReg2(sim, cpuBitwise(sim, cpuGetReg2(sim) & cpuGetImm16U(sim)));
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cpuSetReg2(sim, cpuBitwise(sim, cpuGetReg1(sim) & cpuGetImm16U(sim)));
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cpuAdvance(sim, cpuClocks(1));
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cpuAdvance(sim, cpuClocks(1));
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}
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}
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@ -803,7 +801,7 @@ static int cpuCAXI(VB *sim) {
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/* Update state */
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/* Update state */
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sim->cpu.clocks += cpuClocks(1); /* TODO: Research */
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sim->cpu.clocks += cpuClocks(1); /* TODO: Research */
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cpuSubtract(sim, auxData.value);
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cpuSubtract(sim, cpuGetReg2(sim), auxData.value);
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if (sim->cpu.psw.z)
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if (sim->cpu.psw.z)
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auxData.value = sim->cpu.program[30];
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auxData.value = sim->cpu.program[30];
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@ -832,13 +830,13 @@ static void cpuCLI(VB *sim) {
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/* CMP immediate */
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/* CMP immediate */
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static void cpuCMPImm(VB *sim) {
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static void cpuCMPImm(VB *sim) {
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cpuSubtract(sim, cpuGetImm5S(sim));
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cpuSubtract(sim, cpuGetReg2(sim), cpuGetImm5S(sim));
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cpuAdvance(sim, cpuClocks(1));
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cpuAdvance(sim, cpuClocks(1));
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}
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}
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/* CMP register */
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/* CMP register */
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static void cpuCMPReg(VB *sim) {
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static void cpuCMPReg(VB *sim) {
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cpuSubtract(sim, cpuGetReg1(sim));
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cpuSubtract(sim, cpuGetReg2(sim), cpuGetReg1(sim));
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cpuAdvance(sim, cpuClocks(1));
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cpuAdvance(sim, cpuClocks(1));
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}
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}
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@ -1148,7 +1146,7 @@ static void cpuOR(VB *sim) {
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/* ORI */
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/* ORI */
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static void cpuORI(VB *sim) {
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static void cpuORI(VB *sim) {
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cpuSetReg2(sim, cpuBitwise(sim, cpuGetReg2(sim) | cpuGetImm16U(sim)));
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cpuSetReg2(sim, cpuBitwise(sim, cpuGetReg1(sim) | cpuGetImm16U(sim)));
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cpuAdvance(sim, cpuClocks(1));
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cpuAdvance(sim, cpuClocks(1));
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}
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}
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@ -1262,7 +1260,7 @@ static void cpuSTSR(VB *sim) {
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/* SUB */
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/* SUB */
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static void cpuSUB(VB *sim) {
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static void cpuSUB(VB *sim) {
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cpuSetReg2(sim, cpuSubtract(sim, cpuGetReg1(sim)));
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cpuSetReg2(sim, cpuSubtract(sim, cpuGetReg2(sim), cpuGetReg1(sim)));
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cpuAdvance(sim, cpuClocks(1));
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cpuAdvance(sim, cpuClocks(1));
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}
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}
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@ -1334,7 +1332,7 @@ static void cpuXOR(VB *sim) {
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/* XORI */
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/* XORI */
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static void cpuXORI(VB *sim) {
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static void cpuXORI(VB *sim) {
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cpuSetReg2(sim, cpuBitwise(sim, cpuGetReg2(sim) ^ cpuGetImm16U(sim)));
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cpuSetReg2(sim, cpuBitwise(sim, cpuGetReg1(sim) ^ cpuGetImm16U(sim)));
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cpuAdvance(sim, cpuClocks(1));
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cpuAdvance(sim, cpuClocks(1));
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}
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}
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