Revisions to CPU register interface

src/core/bus.c

@@ -62,9 +62,9 @@ static int32_t busReadValue(VUE *vue, uint32_t address, int type) {
         case 5: /* System WRAM */
             return busReadMemory(vue->bus.wram, address & 0xFFFF, type);
         case 6: return busReadMemory(vue->bus.sram, /* Cartridge RAM */
-            address & (vue->bus.sram_size - 1), type);
+            address & (vue->bus.sramSize - 1), type);
         case 7: return busReadMemory(vue->bus.rom , /* Cartridge ROM */
-            address & (vue->bus.rom_size  - 1), type);
+            address & (vue->bus.romSize  - 1), type);
     }
     return 0; /* Unreachable */
 }
@@ -128,11 +128,11 @@ static void busWriteValue(VUE *vue, uint32_t address, int type, int32_t value){
             break;
         case 6: /* Cartridge RAM */
             busWriteMemory(vue->bus.sram,
-                address & (vue->bus.sram_size - 1), type, value);
+                address & (vue->bus.sramSize - 1), type, value);
             break;
         case 7: /* Cartridge ROM */
             busWriteMemory(vue->bus.rom ,
-                address & (vue->bus.rom_size  - 1), type, value);
+                address & (vue->bus.romSize  - 1), type, value);
             break;
     }
 }

src/core/cpu.c

@@ -142,7 +142,8 @@ static void cpuReset(VUE *vue) {
 
     /* Configure registers */
     vue->cpu.ecr_eicc = 0xFFF0;
-    vue->cpu.lastPC   = 0xFFFFFFF0;
+    vue->cpu.jumpFrom = 0xFFFFFFF0;
+    vue->cpu.jumpTo   = 0xFFFFFFF0;
     vue->cpu.pc       = 0xFFFFFFF0;
     vue->cpu.psw_np   = 1;
 }

src/core/include/vue.h

@@ -38,11 +38,15 @@ extern "C" {
 #define VUE_EIPSW  1
 #define VUE_FEPC   2
 #define VUE_FEPSW  3
-#define VUE_PC    -1
 #define VUE_PIR    6
 #define VUE_PSW    5
 #define VUE_TKCW   7
 
+/* Non-standard register indexes */
+#define VUE_PC        -1
+#define VUE_JUMP_FROM -2
+#define VUE_JUMP_TO   -3
+
 /* Program register indexes */
 #define VUE_GP  4
 #define VUE_HP  2
@@ -65,18 +69,19 @@ typedef struct {
     /* Memory bus */
     struct {
         uint8_t *rom;           /* Cartridge ROM */
-        uint32_t rom_size;      /* Number of bytes in cartridge ROM */
+        uint32_t romSize;       /* Number of bytes in cartridge ROM */
         uint8_t *sram;          /* Cartridge RAM */
-        uint32_t sram_size;     /* Number of bytes in cartridge RAM */
+        uint32_t sramSize;      /* Number of bytes in cartridge RAM */
         uint8_t  wram[0x10000]; /* System memory */
     } bus;
 
     /* CPU state */
     struct {
-        uint32_t cycles; /* Cycles until next stage */
-        int      fetch;  /* Fetch unit index */
-        int32_t  lastPC; /* Previous value of PC */
-        int      stage;  /* Current processing stage */
+        uint32_t cycles;   /* Cycles until next stage */
+        int      fetch;    /* Fetch unit index */
+        int32_t  jumpFrom; /* Source PC of most recent jump */
+        int32_t  jumpTo;   /* Destination PC of most recent jump */
+        int      stage;    /* Current processing stage */
 
         /* Program registers */
         int32_t program[32];

src/core/vue.c

@@ -26,8 +26,20 @@ static const int TYPE_SIZES[] = { 1, 1, 2, 2, 4 };
 
 /* Retrieve the value of a register */
 int32_t vueGetRegister(VUE *vue, int index, vbool system) {
-    return vue == NULL ? 0 :
-        index == VUE_PC && system ? vue->cpu.pc :
+
+    /* Error checking */
+    if (vue == NULL)
+        return 0;
+
+    /* Non-indexed registers */
+    if (system) switch (index) {
+        case VUE_PC       : return vue->cpu.pc;
+        case VUE_JUMP_FROM: return vue->cpu.jumpFrom;
+        case VUE_JUMP_TO  : return vue->cpu.jumpTo;
+    }
+
+    /* Indexed registers */
+    return
         index < 0 || index > 31 ? 0 :
         system ? cpuGetSystemRegister(vue, index) :
         vue->cpu.program[index]
@@ -66,13 +78,13 @@ vbool vueRead(VUE *vue, uint32_t address, uint8_t *dest, uint32_t length) {
                 busReadBytes(NULL, dest, address, 0, count);
                 break;
             case 5: busReadBytes(vue->bus.wram, dest, /* System WRAM  */
-                address, 0x10000       , count);
+                address, 0x10000          , count);
                 break;
             case 6: busReadBytes(vue->bus.sram, dest, /* Cartridge RAM */
-                address, vue->bus.sram_size, count);
+                address, vue->bus.sramSize, count);
                 break;
             case 7: busReadBytes(vue->bus.rom , dest, /* Cartridge ROM */
-                address, vue->bus.rom_size , count);
+                address, vue->bus.romSize , count);
                 break;
         }
 
@@ -110,8 +122,8 @@ vbool vueSetROM(VUE *vue, uint8_t *rom, uint32_t size) {
     ) return VUE_FALSE;
 
     /* Accept the new ROM buffer */
-    vue->bus.rom      = rom;
-    vue->bus.rom_size = size;
+    vue->bus.rom     = rom;
+    vue->bus.romSize = size;
     return VUE_TRUE;
 }
 
@@ -137,10 +149,10 @@ vbool vueWrite(VUE *vue, uint32_t address, uint8_t *src, uint32_t length) {
                 busWriteBytes(vue->bus.wram, src, address, 0x10000, count);
                 break;
             case 6: busWriteBytes(vue->bus.sram, src, /* Cartridge RAM */
-                address, vue->bus.sram_size, count);
+                address, vue->bus.sramSize, count);
                 break;
             case 7: busWriteBytes(vue->bus.rom , src, /* Cartridge ROM */
-                address, vue->bus.rom_size , count);
+                address, vue->bus.romSize , count);
                 break;
         }