#ifndef __VUE_H__
#define __VUE_H__
#ifdef __cplusplus
extern "C" {
#endif

/* API management */
#ifndef VUEAPI
#define VUEAPI extern
#endif

/* Header includes */
#include <stddef.h>
#include <stdint.h>



/*****************************************************************************
 *                                 Constants                                 *
 *****************************************************************************/

/* Boolean values */
#define VUE_FALSE 0
#define VUE_TRUE  1

/* Memory access types */
#define VUE_S8  0
#define VUE_U8  1
#define VUE_S16 2
#define VUE_U16 3
#define VUE_S32 4

/* System register indexes */
#define VUE_ADTRE 25
#define VUE_CHCW  24
#define VUE_ECR    4
#define VUE_EIPC   0
#define VUE_EIPSW  1
#define VUE_FEPC   2
#define VUE_FEPSW  3
#define VUE_PIR    6
#define VUE_PSW    5
#define VUE_TKCW   7

/* Non-standard register indexes */
#define VUE_PC        -1
#define VUE_JUMP_FROM -2
#define VUE_JUMP_TO   -3

/* Program register indexes */
#define VUE_GP  4
#define VUE_HP  2
#define VUE_LP 31
#define VUE_SP  3
#define VUE_TP  5



/*****************************************************************************
 *                                   Types                                   *
 *****************************************************************************/

/* Boolean */
typedef int vbool;

/* Emulation state */
typedef struct {

    /* Memory bus */
    struct {
        uint8_t *rom;           /* Cartridge ROM */
        uint32_t romSize;       /* Number of bytes in cartridge ROM */
        uint8_t *sram;          /* Cartridge RAM */
        uint32_t sramSize;      /* Number of bytes in cartridge RAM */
        uint8_t  wram[0x10000]; /* System memory */
    } bus;

    /* CPU state */
    struct {
        uint32_t cycles;   /* Cycles until next stage */
        int      fetch;    /* Fetch unit index */
        int32_t  jumpFrom; /* Source PC of most recent jump */
        int32_t  jumpTo;   /* Destination PC of most recent jump */
        int      stage;    /* Current processing stage */

        /* Program registers */
        int32_t program[32];

        /* System registers */
        int32_t adtre; /* Address Trap Register for Execution */
        int32_t eipc;  /* Exception/interrupt PC */
        int32_t eipsw; /* Exception/interrupt PSW */
        int32_t fepc;  /* Duplexed exception PC */
        int32_t fepsw; /* Duplexed exception PSW */
        int32_t pc;    /* Program Counter */
        int32_t sr29;  /* System register 29 */
        int32_t sr31;  /* System register 31 */

        /* Program Status Word */
        int8_t psw_ae;  /* Address Trap Enable */
        int8_t psw_ep;  /* Exception Pending */
        int8_t psw_id;  /* Interrupt Disable */
        int8_t psw_cy;  /* Carry */
        int8_t psw_fiv; /* Floating Reserved Operand */
        int8_t psw_fov; /* Floating Overflow */
        int8_t psw_fpr; /* Floating Precision */
        int8_t psw_fro; /* Floating Reserved Operand */
        int8_t psw_fud; /* Floating Underflow */
        int8_t psw_fzd; /* Floating Zero Divide */
        int8_t psw_i;   /* Interrupt Level */
        int8_t psw_np;  /* NMI Pending */
        int8_t psw_ov;  /* Overflow */
        int8_t psw_s;   /* Sign */
        int8_t psw_z;   /* Zero */

        /* Cache Control Word */
        uint16_t chcw_cec; /* Clear Entry Count */
        uint16_t chcw_cen; /* Clear Entry Number */
        int8_t   chcw_icc; /* Instruction Cache Clear */
        int8_t   chcw_icd; /* Instruction Cache Dump */
        int8_t   chcw_ice; /* Instruction Cache Enable */
        int8_t   chcw_icr; /* Instruction Cache Restore */
        int32_t  chcw_sa;  /* Spill-Out Base Address */

        /* Exception Cause Register */
        uint16_t ecr_eicc; /* Exception/Interrupt Cause Code */
        uint16_t ecr_fecc; /* Fatal Error Cause Code */
    } cpu;

} VUE;



/*****************************************************************************
 *                            Function Prototypes                            *
 *****************************************************************************/

VUEAPI int32_t vueGetRegister(VUE *vue, int index, vbool system);
VUEAPI void    vueInitialize (VUE *vue);
VUEAPI vbool   vueRead       (VUE *vue, uint32_t address, uint8_t *dest, uint32_t length);
VUEAPI void    vueReset      (VUE *vue);
VUEAPI int32_t vueSetRegister(VUE *vue, int index, vbool system, int32_t value);
VUEAPI vbool   vueSetROM     (VUE *vue, uint8_t *rom, uint32_t size);
VUEAPI vbool   vueWrite      (VUE *vue, uint32_t address, uint8_t *src, uint32_t length);



#ifdef __cplusplus
}
#endif
#endif /* __VUE_H__ */