346 lines
10 KiB
C
346 lines
10 KiB
C
#ifndef VBAPI
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#define VBAPI
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#endif
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#include <vb.h>
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/*********************************** Types ***********************************/
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/* Simulation state */
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struct VB {
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/* Game Pak */
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struct {
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uint8_t *ram; /* Save RAM */
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uint8_t *rom; /* Program ROM */
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uint32_t ramMask; /* Size of SRAM - 1 */
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uint32_t romMask; /* Size of ROM - 1 */
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} cart;
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/* CPU */
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struct {
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/* Cache Control Word */
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struct {
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uint8_t ice; /* Instruction Cache Enable */
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} chcw;
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/* Exception Cause Register */
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struct {
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uint16_t eicc; /* Exception/Interrupt Cause Code */
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uint16_t fecc; /* Fatal Error Cause Code */
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} ecr;
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/* Program Status Word */
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struct {
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uint8_t ae; /* Address Trap Enable */
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uint8_t cy; /* Carry */
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uint8_t ep; /* Exception Pending */
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uint8_t fiv; /* Floating Invalid */
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uint8_t fov; /* Floating Overflow */
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uint8_t fpr; /* Floading Precision */
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uint8_t fro; /* Floating Reserved Operand */
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uint8_t fud; /* Floading Underflow */
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uint8_t fzd; /* Floating Zero Divide */
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uint8_t i; /* Interrupt Level */
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uint8_t id; /* Interrupt Disable */
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uint8_t np; /* NMI Pending */
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uint8_t ov; /* Overflow */
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uint8_t s; /* Sign */
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uint8_t z; /* Zero */
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} psw;
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/* Other registers */
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uint32_t adtre; /* Address Trap Register for Execution */
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uint32_t eipc; /* Exception/Interrupt PC */
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uint32_t eipsw; /* Exception/Interrupt PSW */
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uint32_t fepc; /* Fatal Error PC */
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uint32_t fepsw; /* Fatal Error PSW */
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uint32_t pc; /* Program Counter */
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int32_t program[32]; /* Program registers */
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uint32_t sr29; /* System register 29 */
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uint32_t sr31; /* System register 31 */
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/* Working data */
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union {
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struct {
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uint32_t address;
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int32_t value;
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} data;
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} aux;
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/* Other state */
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uint32_t clocks; /* Master clocks to wait */
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uint16_t code[2]; /* Instruction code units */
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uint16_t irq; /* Interrupt request lines */
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int length; /* Instruction code length */
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uint32_t nextPC; /* Address of next instruction */
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int operation; /* Current operation ID */
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int step; /* Operation sub-task ID */
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} cpu;
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/* Other system state */
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uint8_t wram[0x10000]; /* System RAM */
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/* Application callbacks */
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vbOnExecute onExecute; /* CPU instruction execute */
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vbOnFetch onFetch; /* CPU instruction fetch */
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vbOnRead onRead; /* CPU instruction read */
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vbOnWrite onWrite; /* CPU instruction write */
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};
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/***************************** Library Functions *****************************/
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/* Determine the lesser of two clocks figures */
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static uint32_t MinClocks(uint32_t a, uint32_t b) {
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return a < b ? a : b;
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}
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/* Sign-extend an integer of variable width */
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static int32_t SignExtend(int32_t value, int32_t bits) {
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value &= ~((uint32_t) 0xFFFFFFFF << bits);
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bits = (int32_t) 1 << (bits - (int32_t) 1);
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return (value ^ bits) - bits;
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}
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/******************************** Sub-Modules ********************************/
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#include "bus.c"
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#include "cpu.c"
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/***************************** Library Functions *****************************/
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/* Process a simulation for a given number of clocks */
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static int sysEmulate(VB *sim, uint32_t clocks) {
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return
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cpuEmulate(sim, clocks)
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;
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}
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/* Determine how many clocks are guaranteed to process */
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static uint32_t sysUntil(VB *sim, uint32_t clocks) {
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clocks = cpuUntil(sim, clocks);
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return clocks;
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}
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/******************************* API Commands ********************************/
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/* Process one simulation */
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VBAPI int vbEmulate(VB *sim, uint32_t *clocks) {
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int brk; /* A callback requested a break */
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uint32_t until; /* Clocks guaranteed to process */
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while (*clocks != 0) {
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until = sysUntil(sim, *clocks);
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brk = sysEmulate(sim, until);
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*clocks -= until;
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if (brk)
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return brk; /* TODO: return 1 */
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}
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return 0;
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}
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/* Process multiple simulations */
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VBAPI int vbEmulateEx(VB **sims, int count, uint32_t *clocks) {
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int brk; /* A callback requested a break */
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uint32_t until; /* Clocks guaranteed to process */
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int x; /* Iterator */
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while (*clocks != 0) {
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until = *clocks;
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for (x = count - 1; x >= 0; x--)
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until = sysUntil(sims[x], until);
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brk = 0;
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for (x = count - 1; x >= 0; x--)
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brk |= sysEmulate(sims[x], until);
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*clocks -= until;
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if (brk)
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return brk; /* TODO: return 1 */
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}
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return 0;
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}
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/* Retrieve a callback handler */
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VBAPI void* vbGetCallback(VB *sim, int id) {
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switch (id) {
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/*case VB_EXCEPTION: return *(void **) &sim->onException;*/
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case VB_EXECUTE : return *(void **) &sim->onExecute;
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case VB_FETCH : return *(void **) &sim->onFetch;
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/*case VB_FRAME : return *(void **) &sim->onFrame;*/
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case VB_READ : return *(void **) &sim->onRead;
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case VB_WRITE : return *(void **) &sim->onWrite;
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}
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return NULL;
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}
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/* Retrieve the game pack RAM buffer */
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VBAPI void* vbGetCartRAM(VB *sim, uint32_t *size) {
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if (size != NULL)
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*size = sim->cart.ram == NULL ? 0 : sim->cart.ramMask + 1;
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return sim->cart.ram;
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}
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/* Retrieve the game pack ROM buffer */
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VBAPI void* vbGetCartROM(VB *sim, uint32_t *size) {
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if (size != NULL)
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*size = sim->cart.rom == NULL ? 0 : sim->cart.romMask + 1;
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return sim->cart.rom;
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}
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/* Retrieve the value of the program counter */
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VBAPI uint32_t vbGetProgramCounter(VB *sim) {
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return sim->cpu.pc;
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}
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/* Retrieve the value in a program register */
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VBAPI int32_t vbGetProgramRegister(VB *sim, int index) {
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return index < 1 || index > 31 ? 0 : sim->cpu.program[index];
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}
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/* Retrieve the value in a system register */
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VBAPI uint32_t vbGetSystemRegister(VB *sim, int index) {
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return index < 0 || index > 31 ? 0 : cpuGetSystemRegister(sim, index);
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}
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/* Initialize a simulation instance */
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VBAPI VB* vbInit(VB *sim) {
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sim->cart.ram = NULL;
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sim->cart.rom = NULL;
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sim->onExecute = NULL;
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sim->onFetch = NULL;
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sim->onRead = NULL;
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sim->onWrite = NULL;
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vbReset(sim);
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return sim;
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}
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/* Read a value from the memory bus */
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VBAPI int32_t vbRead(VB *sim, uint32_t address, int type) {
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int32_t value;
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if (type < 0 || type > 4)
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return 0;
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busRead(sim, address, type, &value);
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return value;
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}
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/* Simulate a hardware reset */
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VBAPI VB* vbReset(VB *sim) {
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uint32_t x; /* Iterator */
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/* WRAM (the hardware does not do this) */
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for (x = 0; x < 0x10000; x++)
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sim->wram[x] = 0x00;
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/* CPU (normal) */
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sim->cpu.irq = 0;
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sim->cpu.pc = 0xFFFFFFF0;
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cpuSetSystemRegister(sim, VB_ECR, 0x0000FFF0, 1);
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cpuSetSystemRegister(sim, VB_PSW, 0x00008000, 1);
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/* CPU (extra, hardware does not do this) */
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sim->cpu.adtre = 0x00000000;
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sim->cpu.eipc = 0x00000000;
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sim->cpu.eipsw = 0x00000000;
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sim->cpu.fepc = 0x00000000;
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sim->cpu.fepsw = 0x00000000;
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sim->cpu.sr29 = 0x00000000;
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sim->cpu.sr31 = 0x00000000;
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cpuSetSystemRegister(sim, VB_CHCW, 0x00000000, 1);
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for (x = 0; x < 32; x++)
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sim->cpu.program[x] = 0x00000000;
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/* CPU (other) */
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sim->cpu.clocks = 0;
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sim->cpu.nextPC = 0xFFFFFFF0;
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sim->cpu.operation = CPU_FETCH;
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sim->cpu.step = 0;
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return sim;
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}
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/* Specify a new callback handler */
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VBAPI void* vbSetCallback(VB *sim, int id, void *callback) {
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void *prev = NULL;
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void **target = NULL;
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/* Select callback by ID */
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switch (id) {
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/*case VB_EXCEPTION: target = (void **) &sim->onException; break;*/
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case VB_EXECUTE : target = (void **) &sim->onExecute ; break;
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case VB_FETCH : target = (void **) &sim->onFetch ; break;
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/*case VB_FRAME : target = (void **) &sim->onFrame ; break;*/
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case VB_READ : target = (void **) &sim->onRead ; break;
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case VB_WRITE : target = (void **) &sim->onWrite ; break;
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}
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/* Retrieve current state and update new state */
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if (target != NULL) {
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prev = *target;
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*target = callback;
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}
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return prev;
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}
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/* Specify a game pak RAM buffer */
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VBAPI int vbSetCartRAM(VB *sim, void *sram, uint32_t size) {
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if (sram != NULL) {
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if (size < 16 || size > 0x1000000 || (size & (size - 1)) != 0)
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return 1;
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sim->cart.ramMask = size - 1;
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}
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sim->cart.ram = sram;
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return 0;
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}
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/* Specify a game pak ROM buffer */
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VBAPI int vbSetCartROM(VB *sim, void *rom, uint32_t size) {
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if (rom != NULL) {
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if (size < 16 || size > 0x1000000 || (size & (size - 1)) != 0)
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return 1;
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sim->cart.romMask = size - 1;
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}
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sim->cart.rom = rom;
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return 0;
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}
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/* Specify a new value for the program counter */
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VBAPI uint32_t vbSetProgramCounter(VB *sim, uint32_t value) {
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sim->cpu.operation = CPU_FETCH;
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sim->cpu.pc = sim->cpu.nextPC = value & 0xFFFFFFFE;
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sim->cpu.step = 0;
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return sim->cpu.pc;
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}
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/* Specify a new value for a program register */
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VBAPI int32_t vbSetProgramRegister(VB *sim, int index, int32_t value) {
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return index < 1 || index > 31 ? 0 : (sim->cpu.program[index] = value);
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}
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/* Specify a new value for a system register */
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VBAPI uint32_t vbSetSystemRegister(VB *sim, int index, uint32_t value) {
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return index < 0 || index > 31 ? 0 :
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cpuSetSystemRegister(sim, index, value, 1);
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}
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/* Determine the size of a simulation instance */
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VBAPI size_t vbSizeOf() {
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return sizeof (VB);
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}
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/* Write a value to the memory bus */
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VBAPI int32_t vbWrite(VB *sim, uint32_t address, int type, int32_t value) {
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if (type < 0 || type > 4)
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return 0;
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busWrite(sim, address, type, value, 1);
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return vbRead(sim, address, type);
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}
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