Fix wrapping memory reads for 64-bit addresses
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parent
84f2cf7ece
commit
2cf99dbc21
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@ -3,7 +3,6 @@ use std::{
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fmt::Display,
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fmt::Display,
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fs::{self, File},
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fs::{self, File},
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io::{Read, Seek, SeekFrom, Write},
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io::{Read, Seek, SeekFrom, Write},
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ops::Range,
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path::{Path, PathBuf},
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path::{Path, PathBuf},
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sync::{
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sync::{
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atomic::{AtomicBool, Ordering},
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atomic::{AtomicBool, Ordering},
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@ -529,11 +528,11 @@ impl Emulator {
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let value = sim.read_register(register);
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let value = sim.read_register(register);
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let _ = done.send(value);
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let _ = done.send(value);
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}
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}
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EmulatorCommand::ReadMemory(sim_id, addresses, mut buffer, done) => {
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EmulatorCommand::ReadMemory(sim_id, start, length, mut buffer, done) => {
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let Some(sim) = self.sims.get_mut(sim_id.to_index()) else {
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let Some(sim) = self.sims.get_mut(sim_id.to_index()) else {
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return;
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return;
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};
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};
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sim.read_memory(addresses, &mut buffer);
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sim.read_memory(start, length, &mut buffer);
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let _ = done.send(buffer);
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let _ = done.send(buffer);
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}
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}
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EmulatorCommand::AddBreakpoint(sim_id, address) => {
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EmulatorCommand::AddBreakpoint(sim_id, address) => {
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@ -611,7 +610,7 @@ pub enum EmulatorCommand {
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DebugContinue(SimId),
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DebugContinue(SimId),
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DebugStep(SimId),
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DebugStep(SimId),
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ReadRegister(SimId, VBRegister, oneshot::Sender<u32>),
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ReadRegister(SimId, VBRegister, oneshot::Sender<u32>),
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ReadMemory(SimId, Range<u32>, Vec<u8>, oneshot::Sender<Vec<u8>>),
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ReadMemory(SimId, u32, usize, Vec<u8>, oneshot::Sender<Vec<u8>>),
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AddBreakpoint(SimId, u32),
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AddBreakpoint(SimId, u32),
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RemoveBreakpoint(SimId, u32),
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RemoveBreakpoint(SimId, u32),
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SetAudioEnabled(bool, bool),
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SetAudioEnabled(bool, bool),
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@ -1,4 +1,4 @@
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use std::{ffi::c_void, ops::Range, ptr, slice};
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use std::{ffi::c_void, ptr, slice};
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use anyhow::{anyhow, Result};
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use anyhow::{anyhow, Result};
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use bitflags::bitflags;
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use bitflags::bitflags;
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@ -349,10 +349,12 @@ impl Sim {
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}
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}
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}
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}
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pub fn read_memory(&mut self, addresses: Range<u32>, into: &mut Vec<u8>) {
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pub fn read_memory(&mut self, start: u32, length: usize, into: &mut Vec<u8>) {
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for address in addresses {
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let mut address = start;
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for _ in 0..length {
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let byte = unsafe { vb_read(self.sim, address, VBDataType::U8) };
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let byte = unsafe { vb_read(self.sim, address, VBDataType::U8) };
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into.push(byte as u8);
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into.push(byte as u8);
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address = address.wrapping_add(1);
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}
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}
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}
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}
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@ -280,17 +280,18 @@ impl GdbConnection {
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}
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}
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} else if let Some(op) = req.match_some_str(["m", "x"]) {
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} else if let Some(op) = req.match_some_str(["m", "x"]) {
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let mut read_memory = || {
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let mut read_memory = || {
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let start = req.match_hex::<u32>()?;
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let start = req.match_hex::<u64>()? as u32;
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if !req.match_str(",") {
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if !req.match_str(",") {
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return None;
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return None;
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};
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};
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let size = req.match_hex::<u32>()?;
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let length = req.match_hex::<usize>()?;
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let mut buf = self.memory_buf.take().unwrap_or_default();
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let mut buf = self.memory_buf.take().unwrap_or_default();
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buf.clear();
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buf.clear();
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let (tx, rx) = ::oneshot::channel();
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let (tx, rx) = ::oneshot::channel();
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self.client.send_command(EmulatorCommand::ReadMemory(
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self.client.send_command(EmulatorCommand::ReadMemory(
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self.sim_id,
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self.sim_id,
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start..(start + size),
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start,
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length,
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buf,
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buf,
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tx,
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tx,
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));
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));
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