Tests for XORBSU and ANDNBSU

This commit is contained in:
Simon Gellis 2024-10-13 21:39:42 -04:00
parent ec3b02d8a5
commit 46d9d35e21
1 changed files with 175 additions and 1 deletions

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@ -2172,7 +2172,7 @@ return_from_trap2:
halt halt
# TODO: Floats # TODO: Floats
# TODO: Bitstrings # TODO: Bitstring search
#========= I / O ============================ #========= I / O ============================
@ -2445,6 +2445,180 @@ movbsu2:
be 4 be 4
halt halt
xorbsu:
# Set up our test data.
movhi hi(0x05000000), r0, r30
movea lo(0x05000000), r30, r30
# Source data
movhi hi(0x76543210), r0, r7
movea lo(0x76543210), r7, r7
st.w r7, 0[r30]
movhi hi(0xfedcba98), r0, r7
movea lo(0xfedcba98), r7, r7
st.w r7, 4[r30]
movhi hi(0xdeadbeef), r0, r7
movea lo(0xdeadbeef), r7, r7
st.w r7, 8[r30]
# Destination at 0x05000100
addi 0x100, r30, r29
# Dst data (set to some known values)
movhi hi(0x11111111), r0, r7
movea lo(0x11111111), r7, r7
st.w r7, 0[r29]
st.w r7, 4[r29]
st.w r7, 8[r29]
st.w r7, 12[r29]
# Copy 93 bits
movea 93, r0, r28
# Read from bit 4
mov 4, r27
# Write starting at bit 7
mov 7, r26
# Execute
xorbsu
# 0 bits left
cmp 0, r28
be 4
halt
# Dst offset now 4
cmp 4, r26
be 4
halt
# Src offset now 1
cmp 1, r27
be 4
halt
# Now inspect the memory...
movhi hi(0x05000100), r0, r29
movea lo(0x05000100), r29, r29
ld.w 0[r29], r6
movhi hi(0xA3B08191), r0, r7
movea lo(0xA3B08191), r7, r7
cmp r6, r7
be 4
halt
ld.w 4[r29], r6
movhi hi(0xE7F4C5D2), r0, r7
movea lo(0xE7F4C5D2), r7, r7
cmp r6, r7
be 4
halt
ld.w 8[r29], r6
movhi hi(0xE47CE66E), r0, r7
movea lo(0xE47CE66E), r7, r7
cmp r6, r7
be 4
halt
ld.w 12[r29], r6
movhi hi(0x1111111f), r0, r7
movea lo(0x1111111f), r7, r7
cmp r6, r7
be 4
halt
andnbsu:
# Set up our test data.
movhi hi(0x05000000), r0, r30
movea lo(0x05000000), r30, r30
# Source data
movhi hi(0x76543210), r0, r7
movea lo(0x76543210), r7, r7
st.w r7, 0[r30]
movhi hi(0xfedcba98), r0, r7
movea lo(0xfedcba98), r7, r7
st.w r7, 4[r30]
movhi hi(0xdeadbeef), r0, r7
movea lo(0xdeadbeef), r7, r7
st.w r7, 8[r30]
# Destination at 0x05000100
addi 0x100, r30, r29
# Dst data (set to some known values)
movhi hi(0x11111111), r0, r7
movea lo(0x11111111), r7, r7
st.w r7, 0[r29]
st.w r7, 4[r29]
st.w r7, 8[r29]
st.w r7, 12[r29]
# Copy 93 bits
movea 93, r0, r28
# Read from bit 4
mov 4, r27
# Write starting at bit 7
mov 7, r26
# Execute
andnbsu
# 0 bits left
cmp 0, r28
be 4
halt
# Dst offset now 4
cmp 4, r26
be 4
halt
# Src offset now 1
cmp 1, r27
be 4
halt
# Now inspect the memory...
movhi hi(0x05000100), r0, r29
movea lo(0x05000100), r29, r29
ld.w 0[r29], r6
movhi hi(0x01100111), r0, r7
movea lo(0x01100111), r7, r7
cmp r6, r7
be 4
halt
ld.w 4[r29], r6
movhi hi(0x01100110), r0, r7
movea lo(0x01100110), r7, r7
cmp r6, r7
be 4
halt
ld.w 8[r29], r6
movhi hi(0x00100000), r0, r7
movea lo(0x00100000), r7, r7
cmp r6, r7
be 4
halt
ld.w 12[r29], r6
movhi hi(0x11111111), r0, r7
movea lo(0x11111111), r7, r7
cmp r6, r7
be 4
halt
caxi: caxi:
movhi 0x500, r0, r6 movhi 0x500, r0, r6
movea 0x10, r6, r6 movea 0x10, r6, r6