283 lines
7.6 KiB
C
283 lines
7.6 KiB
C
#ifndef VBAPI
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#define VBAPI
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#endif
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#include <vb.h>
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/***************************** Utility Functions *****************************/
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/* Select the lesser of two unsigned numbers */
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static uint32_t Min(uint32_t a, uint32_t b) {
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return a < b ? a : b;
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}
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/* Sign-extend an integer, masking upper bits if positive */
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#ifndef VB_SIGNED_PROPAGATE
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/* Generic implementation */
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static int32_t SignExtend(int32_t value, int bits) {
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return value & 1 << (bits - 1) ?
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value | ~0 << bits :
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value & ((1 << bits) - 1)
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;
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}
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#else
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/* Sign-propagating implementation */
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#define SignExtend(v, b) ((int32_t) (v) << (32 - (b)) >> (32 - (b)))
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#endif
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/**************************** Sub-Module Imports *****************************/
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#include "bus.c"
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#include "cpu.c"
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/***************************** Module Functions ******************************/
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/* Process a simulation for a given number of clocks */
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static int sysEmulate(VB *sim, uint32_t clocks) {
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return
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cpuEmulate(sim, clocks)
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;
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}
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/* Determine how many clocks can be simulated without a breakpoint */
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static uint32_t sysUntil(VB *sim, uint32_t clocks) {
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clocks = cpuUntil(sim, clocks);
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return clocks;
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}
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/************************************ API ************************************/
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/* Process a simulation */
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int vbEmulate(VB *sim, uint32_t *clocks) {
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int brk; /* A break was requested */
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uint32_t until; /* Number of clocks during which no break will occur */
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/* Process all clocks */
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for (brk = 0; *clocks != 0 && !brk; *clocks -= until) {
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until = sysUntil (sim, *clocks);
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brk = sysEmulate(sim, until );
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}
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return brk;
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}
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/* Process multiple simulations */
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int vbEmulateEx(VB **sims, int count, uint32_t *clocks) {
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int brk; /* A break was requested */
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uint32_t until; /* Number of clocks during which no break will occur */
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int x; /* Iterator */
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/* Process all clocks */
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for (brk = 0; *clocks != 0 && !brk; *clocks -= until) {
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until = *clocks;
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for (x = 0; x < count; x++)
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until = sysUntil (sims[x], until);
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for (x = 0; x < count; x++)
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brk |= sysEmulate(sims[x], until);
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}
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return brk;
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}
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/* Retrieve a current breakpoint handler */
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void* vbGetCallback(VB *sim, int id) {
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switch (id) {
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case VB_ONEXCEPTION: return *(void **)&sim->onException;
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case VB_ONEXECUTE : return *(void **)&sim->onExecute;
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case VB_ONFETCH : return *(void **)&sim->onFetch;
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case VB_ONREAD : return *(void **)&sim->onRead;
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case VB_ONWRITE : return *(void **)&sim->onWrite;
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}
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return NULL;
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}
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/* Retrieve the value of a register */
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int32_t vbGetRegister(VB *sim, int type, int id) {
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switch (type) {
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case VB_PROGRAM:
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return id < 0 || id > 31 ? 0 : sim->cpu.program[id];
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case VB_SYSTEM:
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return cpuGetSystemRegister(sim, id);
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case VB_OTHER:
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switch (id) {
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case VB_PC: return sim->cpu.pc;
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}
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}
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return 0; /* Invalid type */
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}
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/* Retrieve a handle to the current cartridge ROM data */
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uint8_t* vbGetROM(VB *sim, uint32_t *size) {
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if (size != NULL)
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*size = sim->cart.romSize;
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return sim->cart.rom;
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}
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/* Retrieve a handle to the current cartridge RAM data */
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uint8_t* vbGetSRAM(VB *sim, uint32_t *size) {
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if (size != NULL)
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*size = sim->cart.ramSize;
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return sim->cart.ram;
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}
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/* Prepare a simulation instance for use */
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void vbInit(VB *sim) {
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/* Breakpoint handlers */
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sim->onException = NULL;
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sim->onExecute = NULL;
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sim->onFetch = NULL;
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sim->onRead = NULL;
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sim->onWrite = NULL;
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/* Game pak */
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sim->cart.ram = NULL;
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sim->cart.ramSize = 0;
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sim->cart.rom = NULL;
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sim->cart.romSize = 0;
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/* Hardware reset */
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vbReset(sim);
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}
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/* Read a value from memory */
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int32_t vbRead(VB *sim, uint32_t address, int type) {
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return busRead(sim, address, type);
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}
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/* Read multiple bytes from memory */
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void vbReadEx(VB *sim, uint32_t address, uint8_t *buffer, uint32_t length) {
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while (length--) *buffer++ = busRead(sim, address++, VB_U8);
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}
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/* Simulate a hardware reset */
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void vbReset(VB *sim) {
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int x; /* Iterator */
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/* Reset WRAM (the hardware does not do this) */
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for (x = 0; x < 0x10000; x++)
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sim->wram[x] = 0x00;
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/* CPU (normal) */
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sim->cpu.pc = 0xFFFFFFF0;
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cpuSetSystemRegister(sim, VB_ECR, 0x0000FFF0, 1);
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cpuSetSystemRegister(sim, VB_PSW, 0x00008000, 1);
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for (x = 0; x < 5; x++)
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sim->cpu.irq[x] = 0;
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/* CPU (extra, hardware doesn't do this) */
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sim->cpu.adtre = 0x00000000;
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sim->cpu.eipc = 0x00000000;
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sim->cpu.eipsw = 0x00000000;
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sim->cpu.fepc = 0x00000000;
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sim->cpu.fepsw = 0x00000000;
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sim->cpu.sr29 = 0x00000000;
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sim->cpu.sr31 = 0x00000000;
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cpuSetSystemRegister(sim, VB_CHCW, 0x00000000, 1);
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for (x = 0; x < 32; x++)
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sim->cpu.program[x] = 0x00000000;
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/* CPU (internal) */
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sim->cpu.bitstring = 0;
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sim->cpu.clocks = 0;
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sim->cpu.exception = 0;
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sim->cpu.stage = CPU_FETCH;
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sim->cpu.step = 0;
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}
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/* Specify a breakpoint handler */
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void* vbSetCallback(VB *sim, int id, void *proc) {
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void *prev = vbGetCallback(sim, id);
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switch (id) {
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case VB_ONEXCEPTION: *(void **)&sim->onException = proc; break;
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case VB_ONEXECUTE : *(void **)&sim->onExecute = proc; break;
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case VB_ONFETCH : *(void **)&sim->onFetch = proc; break;
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case VB_ONREAD : *(void **)&sim->onRead = proc; break;
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case VB_ONWRITE : *(void **)&sim->onWrite = proc; break;
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}
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return prev;
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}
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/* Specify a value for a register */
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int32_t vbSetRegister(VB *sim, int type, int id, int32_t value) {
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switch (type) {
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case VB_PROGRAM:
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return id < 1 || id > 31 ? 0 : (sim->cpu.program[id] = value);
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case VB_SYSTEM:
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return cpuSetSystemRegister(sim, id, value, 1);
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case VB_OTHER:
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switch (id) {
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case VB_PC:
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sim->cpu.bitstring = 0;
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sim->cpu.clocks = 0;
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sim->cpu.exception = 0;
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sim->cpu.stage = CPU_FETCH;
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return sim->cpu.pc = value & 0xFFFFFFFE;
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}
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}
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return 0; /* Invalid type or ID */
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}
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/* Specify a cartridge ROM buffer */
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int vbSetROM(VB *sim, uint8_t *data, uint32_t size) {
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/* Specifying no ROM */
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if (data == NULL) {
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sim->cart.rom = NULL;
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sim->cart.romSize = 0;
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return 0;
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}
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/* Error checking */
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if (
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size < 4 ||
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size > 0x1000000 ||
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(size & (size - 1)) /* Power of 2 */
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) return 1;
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/* Register the ROM data */
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sim->cart.rom = data;
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sim->cart.romSize = size;
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return 0;
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}
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/* Specify a cartridge RAM buffer */
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int vbSetSRAM(VB *sim, uint8_t *data, uint32_t size) {
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/* Specifying no SRAM */
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if (data == NULL) {
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sim->cart.ram = NULL;
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sim->cart.ramSize = 0;
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return 0;
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}
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/* Error checking */
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if (
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size < 4 ||
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size > 0x1000000 ||
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(size & (size - 1)) /* Power of 2 */
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) return 1;
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/* Register the SRAM data */
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sim->cart.ram = data;
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sim->cart.ramSize = size;
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return 0;
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}
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/* Write a value to memory */
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void vbWrite(VB *sim, uint32_t address, int type, int32_t value) {
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busWrite(sim, address, type, value, 1);
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}
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/* Write multiple values to memory */
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void vbWriteEx(VB *sim, uint32_t address, uint8_t *buffer, uint32_t length) {
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while (length--) busWrite(sim, address++, VB_U8, *buffer++, 1);
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}
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