310 lines
9.5 KiB
Java
310 lines
9.5 KiB
Java
package vue;
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// Java imports
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import java.util.*;
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// VIP state
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class VIP {
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// Instance fields
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byte[] vram; // Video memory
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// Private fields
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private JavaVue vue; // Emulation state
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///////////////////////////////////////////////////////////////////////////
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// Constructors //
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///////////////////////////////////////////////////////////////////////////
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// Default constructor
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VIP(JavaVue vue) {
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vram = new byte[0x40000];
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this.vue = vue;
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}
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///////////////////////////////////////////////////////////////////////////
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// Package Methods //
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///////////////////////////////////////////////////////////////////////////
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// Process the simulation
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void emulate(int cycles) {
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}
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// Read a value from the CPU bus
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int read(int address, int type) {
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address &= 0x0007FFFF;
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// VRAM
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if (address < 0x00040000)
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return JavaVue.readBuffer(vram, address, type);
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// Mirrors of character memory
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if (address >= 0x00078000)
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return JavaVue.readBuffer(vram,
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address - 0x00078000 >> 13 << 15 | 0x00006000 |
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address & 0x00001FFF,
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type);
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// I/O register or unmapped
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int value = readRegister(address);
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if (type < 2 && (address & 1) == 1)
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value >>= 8;
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switch (type) {
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case Vue.S8 : return value << 24 >> 24;
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case Vue.U8 : return value & 0x000000FF;
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case Vue.S16: return value << 16 >> 16;
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case Vue.S32: return value | readRegister(address + 2) << 16;
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}
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return value; // U16
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}
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// Read bytes from the CPU bus
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void readBytes(int address, byte[] dest, int offset, int length) {
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address &= 0x0007FFFF;
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// Perform the operation
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while (length > 0) {
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int count;
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// VRAM
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if (address < 0x00040000) {
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count = Math.min(length, 0x00040000 - address);
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JavaVue.readBytes(vram, address, dest, offset, count);
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}
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// Mirrors of character memory
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else if (address >= 0x00078000) {
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count = Math.min(length, 0x2000 - (address & 0x1FFF));
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JavaVue.readBytes(vram,
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address - 0x00078000 >> 13 << 15 | 0x00006000 |
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address & 0x00001FFF,
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dest, offset, count);
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}
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// I/O register or unmapped
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else {
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count = Math.min(length, 0x00078000 - address);
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// Read all registers in the range
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while (count > 0) {
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int value = readRegister(address);
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// Odd address
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if ((address & 1) == 1) {
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dest[offset] = (byte) (value >> 8);
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address++;
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count --;
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length --;
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offset ++;
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continue;
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}
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// Even address
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int size = count == 1 ? 1 : 2;
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dest[offset] = (byte) value;
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if (size == 2)
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dest[offset + 1] = (byte) (value >> 8);
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address += size;
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count -= size;
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length -= size;
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offset += size;
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}
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continue;
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}
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// Advance to the next region
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address += count;
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length -= count;
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offset += count;
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}
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}
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// System reset
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void reset() {
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}
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// Determine the number of CPU cycles until a breakpoint could trigger
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int until(int cycles) {
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return cycles;
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}
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// Write a value to the CPU bus
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void write(int address, int type, int value) {
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address &= 0x0007FFFF;
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// VRAM
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if (address < 0x00040000) {
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JavaVue.writeBuffer(vram, address, type, value);
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return;
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}
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// Mirrors of character memory
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if (address >= 0x00078000) {
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JavaVue.writeBuffer(vram,
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address - 0x00078000 >> 13 << 15 | 0x00006000 |
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address & 0x00001FFF,
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type, value);
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return;
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}
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// I/O register or unmapped
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if (type < 2 && (address & 1) == 1)
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value <<= 8;
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writeRegister(address, value);
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if (type == Vue.S32)
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writeRegister(address + 2, value >> 16);
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}
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// Write bytes to the CPU bus
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void writeBytes(int address, byte[] src, int offset, int length) {
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address &= 0x0007FFFF;
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// Perform the operation
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while (length > 0) {
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int count;
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// VRAM
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if (address < 0x00040000) {
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count = Math.min(length, 0x00040000 - address);
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JavaVue.writeBytes(vram, address, src, offset, count);
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}
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// Mirrors of character memory
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else if (address >= 0x00078000) {
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count = Math.min(length, 0x2000 - (address & 0x1FFF));
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JavaVue.writeBytes(vram,
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address - 0x00078000 >> 13 << 15 | 0x00006000 |
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address & 0x00001FFF,
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src, offset, count);
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}
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// I/O register or unmapped
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else {
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count = Math.min(length, 0x00078000 - address);
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// Write all registers in the range
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while (count > 0) {
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int value = src[offset] & 0xFF;
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// Odd address
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if ((address & 1) == 1) {
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writeRegister(address, value << 8);
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address++;
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count --;
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length --;
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offset ++;
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continue;
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}
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// Even address
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int size = count == 1 ? 1 : 2;
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if (size == 2)
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value |= src[offset + 1] << 8;
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writeRegister(address, value);
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address += size;
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count -= size;
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length -= size;
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offset += size;
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}
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continue;
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}
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// Advance to the next region
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address += count;
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length -= count;
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offset += count;
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}
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}
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///////////////////////////////////////////////////////////////////////////
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// Private Methods //
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///////////////////////////////////////////////////////////////////////////
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// Read an I/O register
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private int readRegister(int address) {
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// Process by register
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switch (address & ~1) {
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case 0x0005F800: break; // INTPND
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case 0x0005F802: break; // INTENB
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case 0x0005F804: break; // INTCLR
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case 0x0005F820: break; // DPSTTS
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case 0x0005F822: break; // DPCTRL
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case 0x0005F824: break; // BRTA
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case 0x0005F826: break; // BRTB
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case 0x0005F828: break; // BRTC
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case 0x0005F82A: break; // REST
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case 0x0005F82E: break; // FRMCYC
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case 0x0005F830: break; // CTA
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case 0x0005F840: break; // XPSTTS
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case 0x0005F842: break; // XPCTRL
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case 0x0005F844: break; // VER
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case 0x0005F848: break; // SPT0
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case 0x0005F84A: break; // SPT1
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case 0x0005F84C: break; // SPT2
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case 0x0005F84E: break; // SPT3
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case 0x0005F860: break; // GPLT0
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case 0x0005F862: break; // GPLT1
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case 0x0005F864: break; // GPLT2
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case 0x0005F866: break; // GPLT3
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case 0x0005F868: break; // JPLT0
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case 0x0005F86A: break; // JPLT1
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case 0x0005F86C: break; // JPLT2
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case 0x0005F86E: break; // JPLT3
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case 0x0005F870: break; // BKCOL
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}
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// Unmapped
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return 0;
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}
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// Write an I/O register
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private void writeRegister(int address, int value) {
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// Process by register
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switch (address & ~1) {
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case 0x0005F800: break; // INTPND
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case 0x0005F802: break; // INTENB
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case 0x0005F804: break; // INTCLR
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case 0x0005F820: break; // DPSTTS
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case 0x0005F822: break; // DPCTRL
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case 0x0005F824: break; // BRTA
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case 0x0005F826: break; // BRTB
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case 0x0005F828: break; // BRTC
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case 0x0005F82A: break; // REST
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case 0x0005F82E: break; // FRMCYC
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case 0x0005F830: break; // CTA
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case 0x0005F840: break; // XPSTTS
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case 0x0005F842: break; // XPCTRL
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case 0x0005F844: break; // VER
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case 0x0005F848: break; // SPT0
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case 0x0005F84A: break; // SPT1
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case 0x0005F84C: break; // SPT2
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case 0x0005F84E: break; // SPT3
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case 0x0005F860: break; // GPLT0
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case 0x0005F862: break; // GPLT1
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case 0x0005F864: break; // GPLT2
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case 0x0005F866: break; // GPLT3
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case 0x0005F868: break; // JPLT0
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case 0x0005F86A: break; // JPLT1
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case 0x0005F86C: break; // JPLT2
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case 0x0005F86E: break; // JPLT3
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case 0x0005F870: break; // BKCOL
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}
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}
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}
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