Timer accuracy adjustments

This commit is contained in:
Guy Perfect 2024-12-26 12:23:00 -06:00
parent 27e926bd58
commit b83b49221d
2 changed files with 40 additions and 14 deletions

View File

@ -5,6 +5,15 @@
/***************************** Module Functions ******************************/
/* Compute clocks until the next decrement to zero */
static uint32_t tmrGetUntil(VB *sim) {
uint32_t full = sim->tmr.reload * (sim->tmr.t_clk_sel ? 400 : 2000);
uint32_t cur = sim->tmr.clocks +
(sim->tmr.t_clk_sel ? 0 : 400 * (4 - sim->tmr.tick20));
return sim->tmr.counter == 0 ?
sim->tmr.reload * full : (sim->tmr.counter - 1) * full + cur;
}
/* Update the counter to a new value */
static void tmrUpdate(VB *sim, uint16_t value) {
if (value == 0 && sim->tmr.counter != 0) {
@ -23,10 +32,6 @@ static void tmrUpdate(VB *sim, uint16_t value) {
/* Process component */
static void tmrEmulate(VB *sim, uint32_t clocks) {
/* Timer is disabled */
if (!sim->tmr.t_enb)
return;
/* Process all clocks */
for (;;) {
@ -38,15 +43,22 @@ static void tmrEmulate(VB *sim, uint32_t clocks) {
}
/* Advance forward the component's number of clocks */
clocks -= sim->tmr.clocks;
sim->tmr.until -= sim->tmr.clocks;
sim->tmr.clocks = sim->tmr.t_clk_sel ? 400 : 2000;
clocks -= sim->tmr.clocks;
sim->tmr.until -= sim->tmr.clocks;
sim->tmr.clocks = 400;
sim->tmr.tick20 += sim->tmr.tick20 == 4 ? -4 : 1;
/* Do not decrement counter */
if (
!sim->tmr.t_enb ||
!sim->tmr.t_clk_sel && sim->tmr.tick20 != 0
) continue;
/* Advance to the next counter value */
tmrUpdate(sim, sim->tmr.counter == 0 ?
sim->tmr.reload : sim->tmr.counter - 1);
if (sim->tmr.counter == 0)
sim->tmr.until = sim->tmr.clocks * ((uint32_t)sim->tmr.reload + 1);
sim->tmr.until = tmrGetUntil(sim);
}
}
@ -71,8 +83,10 @@ static void tmrReset(VB *sim) {
sim->tmr.z_stat = 0;
/* Other */
sim->tmr.clocks = 400;
sim->tmr.counter = 0xFFFF;
sim->tmr.reload = 0x0000;
sim->tmr.tick20 = 0;
}
/* Determine how many clocks are guaranteed to process */
@ -88,14 +102,27 @@ static void tmrWriteControl(VB *sim, uint8_t value) {
if (
(value & 0x04) && /* Z-Stat-Clr */
(
sim->tmr.counter != 0 ||
!sim->tmr.t_enb
!sim->tmr.t_enb ||
(
sim->tmr.counter != 0 &&
!(value & 0x01) /* T-Enb */
)
)
) {
sim->tmr.z_stat = sim->tmr.counter != 0;
sim->cpu.irq &= ~0x0002;
}
/* Hardware bug: decrement on switch to 20us mode */
if (
!sim->tmr.t_clk_sel &&
(value & 0x10) && /* T-Clk-Sel */
sim->tmr.tick20 != 4
) {
tmrUpdate(sim, sim->tmr.counter == 0 ?
sim->tmr.reload : sim->tmr.counter - 1);
}
/* Parse fields */
sim->tmr.t_clk_sel = value >> 4 & 1;
sim->tmr.tim_z_int = value >> 3 & 1;
@ -105,10 +132,8 @@ static void tmrWriteControl(VB *sim, uint8_t value) {
if (!sim->tmr.tim_z_int)
sim->cpu.irq &= ~0x0002;
/* Configure countdowns */
sim->tmr.clocks = sim->tmr.t_clk_sel ? 400 : 2000;
sim->tmr.until = sim->tmr.clocks * (sim->tmr.counter == 0 ?
(uint32_t) sim->tmr.reload + 1 : sim->tmr.counter);
/* Configure state */
sim->tmr.until = tmrGetUntil(sim);
/* TODO: Will Z-Stat raise an interrupt when Tim-Z-Int is set? */
}

View File

@ -251,6 +251,7 @@ struct VB {
uint32_t clocks; /* Master clocks to wait */
uint16_t counter; /* Current counter value */
uint16_t reload; /* Reload counter value */
uint8_t tick20; /* Current 20-microsecond tick */
uint32_t until; /* Clocks until interrupt condition */
} tmr;