Aid VSU performance
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@ -64,7 +64,9 @@ typedef struct {
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} wave;
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/* Other state */
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uint32_t clocks; /* Clocks until next sample */
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uint32_t clocks; /* Clocks until next wave or noise sample */
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uint8_t freqmod; /* Frequency modifications are active */
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uint32_t until; /* Clocks until channel component update */
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} Channel;
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/* Simulation state */
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183
core/vsu.c
183
core/vsu.c
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@ -74,100 +74,57 @@ static void vsuNextFreqMod(VB *sim, Channel *chan) {
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}
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/* Process one channel */
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static void vsuEmulateChannel(VB *sim, int index, uint32_t clocks) {
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uint32_t bit; /* Pseudorandom bit */
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Channel *chan; /* Channel handle */
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int freqmod; /* Frequency modifications enabled */
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uint32_t until; /* Clocks to process sub-channel components */
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static void vsuEmulateChannel(VB *sim, Channel *chan, uint32_t clocks) {
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uint32_t bit; /* Pseudorandom bit */
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/* Select channel */
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chan = &sim->vsu.channels[index];
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/* Channel is disabled */
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if (!chan->int_.enb)
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/* Automatic shutoff */
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if (chan->int_.auto_ && chan->int_.clocks == 0) {
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chan->int_.enb = 0;
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return;
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}
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/* Frequency modifications are active */
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freqmod =
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index == 4 && /* Channel 5 */
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sim->vsu.freqmod.enb && /* Modifications enabled */
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sim->vsu.freqmod.interval != 0 /* Modifications valid */
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;
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/* Next input sample */
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if (chan->clocks == 0) {
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/* Process all clocks */
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do {
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/* Wave */
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if (chan != &sim->vsu.channels[5]) {
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chan->clocks = 4 * (2048 - (uint32_t) chan->freq.current);
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chan->wave.sample = (chan->wave.sample + 1) & 31;
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}
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/* Clocks until next state change */
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until = clocks;
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if (chan->clocks < until)
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until = chan->clocks;
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if (chan->env.enb && chan->env.clocks < until)
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until = chan->env.clocks;
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if (chan->int_.auto_ && chan->int_.clocks < until)
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until = chan->int_.clocks;
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if (freqmod && sim->vsu.freqmod.clocks < until)
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until = sim->vsu.freqmod.clocks;
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/* Noise */
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else {
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chan->clocks = 40 * (2048 - (uint32_t) chan->freq.current);
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bit = ((
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sim->vsu.noise.register_ >> NOISE_TAPS[sim->vsu.noise.tap]^
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sim->vsu.noise.register_ >> 7
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) & 1) ^ 1;
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sim->vsu.noise.register_ = bit |
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(sim->vsu.noise.register_ << 1 & 0x7FFE);
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}
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/* Manage clocks */
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clocks -= until;
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chan->clocks -= until;
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if (chan->env.enb)
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chan->env.clocks -= until;
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if (chan->int_.auto_)
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chan->int_.clocks -= until;
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if (freqmod)
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sim->vsu.freqmod.clocks -= until;
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}
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/* Automatic shutoff */
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if (chan->int_.auto_ && chan->int_.clocks == 0) {
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chan->int_.enb = 0;
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/* Envelope modification */
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if (chan->env.enb && chan->env.clocks == 0) {
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if (chan->env.dir == 0 && chan->env.value != 0)
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chan->env.value--;
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else if (chan->env.dir == 1 && chan->env.value != 15)
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chan->env.value++;
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else if (chan->env.rep)
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chan->env.value = chan->env.reload;
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chan->env.clocks = ((uint32_t) chan->env.interval + 1) * 307220;
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}
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/* Frequency modification */
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if (chan->freqmod && sim->vsu.freqmod.clocks == 0) {
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chan->freq.current = sim->vsu.freqmod.next;
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vsuNextFreqMod(sim, chan);
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if (!chan->int_.enb)
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return;
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}
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/* Next sample */
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if (chan->clocks == 0) {
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/* Wave */
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if (index != 5) {
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chan->clocks = 4 * (2048 - (uint32_t) chan->freq.current);
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chan->wave.sample = (chan->wave.sample + 1) & 31;
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}
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/* Noise */
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else {
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chan->clocks = 40 * (2048 - (uint32_t) chan->freq.current);
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bit = ((
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sim->vsu.noise.register_ >> NOISE_TAPS[sim->vsu.noise.tap]^
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sim->vsu.noise.register_ >> 7
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) & 1) ^ 1;
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sim->vsu.noise.register_ = bit |
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(sim->vsu.noise.register_ << 1 & 0x7FFE);
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}
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}
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/* Envelope modification */
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if (chan->env.enb && chan->env.clocks == 0) {
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if (chan->env.dir == 0 && chan->env.value != 0)
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chan->env.value--;
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else if (chan->env.dir == 1 && chan->env.value != 15)
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chan->env.value++;
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else if (chan->env.rep)
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chan->env.value = chan->env.reload;
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chan->env.clocks = ((uint32_t) chan->env.interval + 1) * 307220;
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}
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/* Frequency modification */
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if (freqmod && sim->vsu.freqmod.clocks == 0) {
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chan->freq.current = sim->vsu.freqmod.next;
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vsuNextFreqMod(sim, chan);
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if (!chan->int_.enb)
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return;
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sim->vsu.freqmod.clocks = (uint32_t) sim->vsu.freqmod.interval *
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(sim->vsu.freqmod.clk == 0 ? 19200 : 153600);
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}
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} while (clocks != 0);
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sim->vsu.freqmod.clocks = (uint32_t) sim->vsu.freqmod.interval *
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(sim->vsu.freqmod.clk == 0 ? 19200 : 153600);
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}
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}
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@ -230,6 +187,8 @@ static void vsuWriteEV1(VB *sim, int index, uint8_t value) {
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sim->vsu.freqmod.func = value >> 4 & 1;
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sim->vsu.freqmod.rep = value >> 5 & 1;
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vsuNextFreqMod(sim, chan);
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chan->freqmod =
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sim->vsu.freqmod.enb && sim->vsu.freqmod.interval != 0;
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break;
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case 5: /* Channel 6 */
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@ -313,6 +272,8 @@ static void vsuWriteSWP(VB *sim, uint8_t value) {
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(sim->vsu.freqmod.clk == 0 ? 19200 : 153600);
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if (clocks < sim->vsu.freqmod.clocks)
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sim->vsu.freqmod.clocks = clocks;
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sim->vsu.channels[4].freqmod =
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sim->vsu.freqmod.enb && sim->vsu.freqmod.interval != 0;
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}
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@ -321,6 +282,8 @@ static void vsuWriteSWP(VB *sim, uint8_t value) {
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/* Process component */
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static void vsuEmulate(VB *sim, uint32_t clocks) {
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Channel *chan; /* Input channel */
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uint32_t chantil; /* Clocks until next channel state update */
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float i0; /* Current analog input sample */
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float o0; /* Current analog output sample */
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uint16_t output[2]; /* Digital output samples */
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@ -340,8 +303,50 @@ static void vsuEmulate(VB *sim, uint32_t clocks) {
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sim->vsu.clocks -= until;
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/* Process all channels */
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for (x = 0; x < 6; x++)
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vsuEmulateChannel(sim, x, until);
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for (x = 0; x < 6; x++) {
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chan = &sim->vsu.channels[x];
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chantil = until;
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/* Process all clocks */
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while (chan->int_.enb && chantil != 0) {
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/* Determine when the next state change will occur */
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if (chan->until == 0) {
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/* Clocks until next state change */
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chan->until = chan->clocks;
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if (chan->env.enb && chan->env.clocks < chan->until)
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chan->until = chan->env.clocks;
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if (chan->int_.auto_ && chan->int_.clocks < chan->until)
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chan->until = chan->int_.clocks;
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if (chan->freqmod && sim->vsu.freqmod.clocks < chan->until)
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chan->until = sim->vsu.freqmod.clocks;
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/* Manage clocks */
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chan->clocks -= chan->until;
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if (chan->env.enb)
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chan->env.clocks -= chan->until;
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if (chan->int_.auto_)
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chan->int_.clocks -= chan->until;
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if (chan->freqmod)
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sim->vsu.freqmod.clocks -= chan->until;
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}
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/* Manage clocks */
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if (chan->until > chantil) {
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chan->until -= chantil;
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chantil = 0;
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} else {
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chantil -= chan->until;
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chan->until = 0;
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}
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/* Update channel state */
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if (chan->until == 0)
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vsuEmulateChannel(sim, chan, chan->until);
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}
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}
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/* Wait for the current sample to finish */
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if (sim->vsu.clocks != 0)
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@ -416,6 +421,8 @@ static void vsuReset(VB *sim) {
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for (x = 0; x < 6; x++) {
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chan = &sim->vsu.channels[x];
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chan->clocks = 0;
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chan->freqmod = 0;
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chan->until = 0;
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chan->env.clocks = 0;
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chan->env.enb = 0;
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chan->env.dir = 0;
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