Callback symbols, VIP read/write
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@@ -87,7 +87,55 @@ struct VB {
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int step; /* Operation sub-task ID */
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} cpu;
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/* Other system state */
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/* VIP */
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struct {
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/* CTA */
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struct {
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uint8_t cta_l; /* Left column table index */
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uint8_t cta_r; /* Right column table index */
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} cta;
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/* Display control */
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struct {
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uint8_t disp; /* Display enabled */
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uint8_t fclk; /* Frame clock signal high */
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uint8_t l0bsy; /* Displaying left frame buffer 0 */
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uint8_t l1bsy; /* Displaying left frame buffer 1 */
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uint8_t lock; /* Lock CTA */
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uint8_t r0bsy; /* Displaying right frame buffer 0 */
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uint8_t r1bsy; /* Displaying right frame buffer 1*/
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uint8_t re; /* Memory refresh enabled */
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uint8_t scanrdy; /* Mirrors are stable */
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uint8_t synce; /* Servo enabled */
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} dpctrl;
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/* Drawing control */
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struct {
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uint8_t f0bsy; /* Drawing into frame buffer 0 */
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uint8_t f1bsy; /* Drawing into frame buffer 1 */
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uint8_t overtime; /* Drawing extends into display interval */
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uint8_t sbcmp; /* Vertical output position compare */
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uint8_t sbcount; /* Current vertical output position */
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uint8_t sbout; /* Drawing specified vertical output position */
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uint8_t xpen; /* Drawing enabled */
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} xpctrl;
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/* Control state */
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uint8_t bkcol; /* Backdrop color */
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uint8_t brtRest[4]; /* Brightness and REST */
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uint8_t frmcyc; /* Game frame control */
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uint8_t gplt[4][4]; /* Background palettes */
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uint16_t intenb; /* Interrupts enabled */
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uint16_t intpnd; /* Interrupts pending */
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uint8_t jplt[4][4]; /* Object palettes */
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uint16_t spt[4]; /* Object control */
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/* Other state */
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uint8_t vram[0x40000]; /* Video memory */
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} vip;
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/* Other state */
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uint8_t wram[0x10000]; /* System RAM */
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/* Application data */
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@@ -120,6 +168,7 @@ static int32_t SignExtend(int32_t value, int32_t bits) {
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#include "bus.c"
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#include "cpu.c"
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#include "vip.c"
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@@ -128,13 +177,15 @@ static int32_t SignExtend(int32_t value, int32_t bits) {
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/* Process a simulation for a given number of clocks */
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static int sysEmulate(VB *sim, uint32_t clocks) {
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return
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cpuEmulate(sim, clocks)
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cpuEmulate(sim, clocks) |
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vipEmulate(sim, clocks)
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;
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}
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/* Determine how many clocks are guaranteed to process */
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static uint32_t sysUntil(VB *sim, uint32_t clocks) {
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clocks = cpuUntil(sim, clocks);
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clocks = vipUntil(sim, clocks);
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return clocks;
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}
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@@ -259,38 +310,15 @@ VBAPI int32_t vbRead(VB *sim, uint32_t address, int type) {
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/* Simulate a hardware reset */
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VBAPI VB* vbReset(VB *sim) {
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uint32_t x; /* Iterator */
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int x; /* Iterator */
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/* WRAM (the hardware does not do this) */
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for (x = 0; x < 0x10000; x++)
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sim->wram[x] = 0x00;
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/* CPU (normal) */
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sim->cpu.exception = 0;
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sim->cpu.halt = 0;
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sim->cpu.irq = 0;
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sim->cpu.pc = 0xFFFFFFF0;
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cpuSetSystemRegister(sim, VB_ECR, 0x0000FFF0, 1);
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cpuSetSystemRegister(sim, VB_PSW, 0x00008000, 1);
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/* CPU (extra, hardware does not do this) */
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sim->cpu.adtre = 0x00000000;
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sim->cpu.eipc = 0x00000000;
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sim->cpu.eipsw = 0x00000000;
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sim->cpu.fepc = 0x00000000;
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sim->cpu.fepsw = 0x00000000;
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sim->cpu.sr29 = 0x00000000;
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sim->cpu.sr31 = 0x00000000;
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cpuSetSystemRegister(sim, VB_CHCW, 0x00000000, 1);
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for (x = 0; x < 32; x++)
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sim->cpu.program[x] = 0x00000000;
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/* CPU (other) */
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sim->cpu.clocks = 0;
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sim->cpu.nextPC = 0xFFFFFFF0;
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sim->cpu.operation = CPU_FETCH;
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sim->cpu.step = 0;
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/* Components */
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cpuReset(sim);
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vipReset(sim);
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return sim;
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}
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