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ecbd103917
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ecbd103917 | ||
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b2412d9487 | ||
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dd1045553b |
@@ -360,10 +360,11 @@ struct VB {
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uint8_t shift; /* Sweep shift amount */
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uint8_t shift; /* Sweep shift amount */
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/* Other state */
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/* Other state */
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uint32_t clocks; /* Clocks until modification */
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uint32_t clocks; /* Clocks until modification */
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uint8_t modmask; /* Modifications masked */
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uint8_t freqmask; /* Frequency mask */
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uint16_t next; /* Next frequency value */
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uint8_t modmask; /* Modifications masked */
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int sample; /* Current sample index */
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uint16_t next; /* Next frequency value */
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int sample; /* Current sample index */
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} freqmod;
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} freqmod;
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/* Channel 6 noise generator */
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/* Channel 6 noise generator */
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@@ -436,6 +436,9 @@ static void vipWriteIO(
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case 0x5F802>>1: /* INTENB */
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case 0x5F802>>1: /* INTENB */
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sim->vip.intenb = (sim->vip.intenb & mask) | (value & 0xE01F);
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sim->vip.intenb = (sim->vip.intenb & mask) | (value & 0xE01F);
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if (sim->vip.intenb & sim->vip.intpnd)
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sim->cpu.irq |= 0x0010;
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else sim->cpu.irq &= ~0x0010;
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break;
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break;
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case 0x5F804>>1: /* INTCLR */
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case 0x5F804>>1: /* INTCLR */
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sim->vip.intpnd &= ~value;
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sim->vip.intpnd &= ~value;
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+20
-12
@@ -82,12 +82,12 @@ static void vsuNextFreqMod(VB *sim, Channel *chan) {
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/* Modulation */
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/* Modulation */
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else {
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else {
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next = (int32_t) chan->freq.written +
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next = ((int32_t) chan->freq.written +
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sim->vsu.modulation[sim->vsu.freqmod.sample];
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sim->vsu.modulation[sim->vsu.freqmod.sample]) & 0x7FF;
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if (next < 0)
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if (sim->vsu.freqmod.freqmask == 1)
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next = 0;
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next = (next & 0x700) | (chan->freq.written & 0x0FF);
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if (next > 2047)
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else if (sim->vsu.freqmod.freqmask == 2)
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next = 2047;
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next = (next & 0x0FF) | (chan->freq.written & 0x700);
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}
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}
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/* Configure state */
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/* Configure state */
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@@ -257,8 +257,10 @@ static void vsuWriteFQH(VB *sim, int index, uint16_t value) {
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value = value << 8 & 0x0700;
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value = value << 8 & 0x0700;
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chan->freq.current = (chan->freq.current & 0x00FF) | value;
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chan->freq.current = (chan->freq.current & 0x00FF) | value;
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chan->freq.written = (chan->freq.written & 0x00FF) | value;
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chan->freq.written = (chan->freq.written & 0x00FF) | value;
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if (index == 4)
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if (index != 4)
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vsuNextFreqMod(sim, chan);
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return;
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sim->vsu.freqmod.freqmask = 2;
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vsuNextFreqMod(sim, chan);
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}
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}
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/* Write a value to S*FQL */
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/* Write a value to S*FQL */
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@@ -266,8 +268,10 @@ static void vsuWriteFQL(VB *sim, int index, uint8_t value) {
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Channel *chan = &sim->vsu.channels[index];
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Channel *chan = &sim->vsu.channels[index];
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chan->freq.current = (chan->freq.current & 0x0700) | value;
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chan->freq.current = (chan->freq.current & 0x0700) | value;
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chan->freq.written = (chan->freq.written & 0x0700) | value;
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chan->freq.written = (chan->freq.written & 0x0700) | value;
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if (index == 4)
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if (index != 4)
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vsuNextFreqMod(sim, chan);
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return;
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sim->vsu.freqmod.freqmask = 1;
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vsuNextFreqMod(sim, chan);
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}
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}
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/* Write a value to S*INT */
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/* Write a value to S*INT */
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@@ -507,6 +511,7 @@ static void vsuReset(VB *sim) {
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sim->vsu.freqmod.clocks = 0;
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sim->vsu.freqmod.clocks = 0;
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sim->vsu.freqmod.dir = 0;
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sim->vsu.freqmod.dir = 0;
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sim->vsu.freqmod.enb = 0;
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sim->vsu.freqmod.enb = 0;
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sim->vsu.freqmod.freqmask = 0;
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sim->vsu.freqmod.func = 0;
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sim->vsu.freqmod.func = 0;
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sim->vsu.freqmod.interval = 0;
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sim->vsu.freqmod.interval = 0;
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sim->vsu.freqmod.modmask = 0;
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sim->vsu.freqmod.modmask = 0;
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@@ -536,11 +541,14 @@ static void vsuWrite(VB*sim,uint32_t address,int type,int32_t value,int debug){
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}
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}
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/* Unmapped */
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/* Unmapped */
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if (address & 3)
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if (address & 1)
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return;
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return;
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/* Working variables */
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/* Working variables */
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address &= 0x7FF;
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address &= 0x7FC;
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/* Clear frequency mask */
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sim->vsu.freqmod.freqmask = 0;
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/* Wave memory */
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/* Wave memory */
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if (address < 0x280) {
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if (address < 0x280) {
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