Pseudo-halt timing fix

This commit is contained in:
2024-10-23 21:16:35 -05:00
parent 0c914fce1a
commit bcd80d291b
3 changed files with 20 additions and 8 deletions
+16 -6
View File
@@ -322,6 +322,7 @@ struct VB {
/* CPU snapshot */
uint32_t adtre;
uint32_t chcw;
uint32_t ecr;
uint32_t eipc;
uint32_t eipsw;
uint32_t fepc;
@@ -381,12 +382,21 @@ static int32_t SignExtend(int32_t value, int32_t bits) {
/* Process a simulation for a given number of clocks */
static int sysEmulate(VB *sim, uint32_t clocks) {
int ret;
ret = cpuEmulate(sim, clocks);
padEmulate(sim, clocks);
tmrEmulate(sim, clocks);
vsuEmulate(sim, clocks);
ret |= vipEmulate(sim, clocks);
int ret = 0;
/* CPU is in a pseudo-halt state that requires an interrupt to exit */
int never =
sim->cpu.operation == CPU_PHALT &&
sim->ph.operation == PH_NEVER
;
/* Process all components */
if (!never) ret = cpuEmulate(sim, clocks);
padEmulate(sim, clocks);
tmrEmulate(sim, clocks);
vsuEmulate(sim, clocks);
ret |= vipEmulate(sim, clocks);
if ( never) ret |= cpuEmulate(sim, clocks);
return ret;
}