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20 Commits
Author SHA1 Message Date
GuyPerfect b2412d9487 Fix shameful syntax error 2025-03-01 15:51:49 -06:00
GuyPerfect dd1045553b Even more VSU edge cases 2025-03-01 15:42:16 -06:00
GuyPerfect 459a16076a Expand BRTx to 0..132, fix affine parallax 2025-02-25 09:02:22 -06:00
GuyPerfect 185362e6cd Fix BKCOL debug writes, more VSU edge cases 2025-02-24 13:44:26 -06:00
GuyPerfect c62dd833a3 Include missing ISX decover 2025-02-18 15:13:18 -06:00
GuyPerfect 4f0b889b74 Adjustments for use in the web frontend 2025-02-18 15:10:46 -06:00
GuyPerfect 8ae8980fc8 Implement ISX decoding 2025-02-18 15:09:38 -06:00
GuyPerfect 10505e9e98 Supporting additional VSU edge cases 2025-02-18 15:09:15 -06:00
GuyPerfect 155a3aa678 Adjust GAMESTART logic, consolidate VIP sign-extensions 2025-01-17 09:43:58 -06:00
GuyPerfect 04e79c9151 Fix sign extensions from vipRead() and busReadMisc() 2025-01-15 19:47:44 -06:00
GuyPerfect 57dcd8370a Frame buffer management fixes 2025-01-05 20:54:37 -06:00
GuyPerfect 06849b54ba Fix TRAP restore PC, but better 2024-12-29 09:52:07 -06:00
GuyPerfect eef255b507 Fix TRAP restore PC 2024-12-29 09:22:14 -06:00
GuyPerfect db966c8cb8 Fix memory growth handling 2024-12-26 14:13:13 -06:00
GuyPerfect b4feff41f0 Fix broken timer fix bug fixes 2024-12-26 13:23:56 -06:00
GuyPerfect 4449acada0 Fix timer clock computation 2024-12-26 12:57:44 -06:00
GuyPerfect 799ac9f51a Fix style check error 2024-12-26 12:28:10 -06:00
GuyPerfect b83b49221d Timer accuracy adjustments 2024-12-26 12:23:00 -06:00
GuyPerfect 27e926bd58 Fix byte writes to VIP cells, objects and worlds 2024-12-25 13:48:39 -06:00
GuyPerfect d802d39d8d Prevent non-debug writes to CTA 2024-12-23 09:56:54 -06:00
15 changed files with 606 additions and 114 deletions
+2
View File
@@ -159,6 +159,8 @@ static void busRead(VB *sim, uint32_t address, int type, int32_t *value) {
case 2: /* Misc. I/O */
*value = busReadMisc(sim, address, type);
if (type == VB_S8)
*value = (int8_t) *value;
break;
case 3: break; /* Unmapped */
+1
View File
@@ -1637,6 +1637,7 @@ static void cpuSUBF_S(VB *sim) {
/* TRAP */
static void cpuTRAP(VB *sim) {
sim->cpu.clocks += cpuClocks(15);
sim->cpu.pc += 2;
cpuThrow(sim, 0xFFA0 + cpuGetImm5U(sim));
}
+41 -14
View File
@@ -5,6 +5,15 @@
/***************************** Module Functions ******************************/
/* Compute clocks until the next decrement to zero */
static uint32_t tmrGetUntil(VB *sim) {
uint32_t fullTick = sim->tmr.t_clk_sel ? 400 : 2000;
uint32_t thisTick = sim->tmr.clocks +
(sim->tmr.t_clk_sel ? 0 : 400 * (4 - sim->tmr.tick20));
return thisTick + fullTick *
(sim->tmr.counter == 0 ? sim->tmr.reload : sim->tmr.counter - 1);
}
/* Update the counter to a new value */
static void tmrUpdate(VB *sim, uint16_t value) {
if (value == 0 && sim->tmr.counter != 0) {
@@ -23,10 +32,6 @@ static void tmrUpdate(VB *sim, uint16_t value) {
/* Process component */
static void tmrEmulate(VB *sim, uint32_t clocks) {
/* Timer is disabled */
if (!sim->tmr.t_enb)
return;
/* Process all clocks */
for (;;) {
@@ -38,15 +43,22 @@ static void tmrEmulate(VB *sim, uint32_t clocks) {
}
/* Advance forward the component's number of clocks */
clocks -= sim->tmr.clocks;
sim->tmr.until -= sim->tmr.clocks;
sim->tmr.clocks = sim->tmr.t_clk_sel ? 400 : 2000;
clocks -= sim->tmr.clocks;
sim->tmr.until -= sim->tmr.clocks;
sim->tmr.clocks = 400;
sim->tmr.tick20 += sim->tmr.tick20 == 4 ? -4 : 1;
/* Do not decrement counter */
if (
!sim->tmr.t_enb ||
(!sim->tmr.t_clk_sel && sim->tmr.tick20 != 0)
) continue;
/* Advance to the next counter value */
tmrUpdate(sim, sim->tmr.counter == 0 ?
sim->tmr.reload : sim->tmr.counter - 1);
if (sim->tmr.counter == 0)
sim->tmr.until = sim->tmr.clocks * ((uint32_t)sim->tmr.reload + 1);
sim->tmr.until = tmrGetUntil(sim);
}
}
@@ -71,8 +83,10 @@ static void tmrReset(VB *sim) {
sim->tmr.z_stat = 0;
/* Other */
sim->tmr.clocks = 400;
sim->tmr.counter = 0xFFFF;
sim->tmr.reload = 0x0000;
sim->tmr.tick20 = 0;
}
/* Determine how many clocks are guaranteed to process */
@@ -88,14 +102,27 @@ static void tmrWriteControl(VB *sim, uint8_t value) {
if (
(value & 0x04) && /* Z-Stat-Clr */
(
sim->tmr.counter != 0 ||
!sim->tmr.t_enb
!sim->tmr.t_enb ||
(
sim->tmr.counter != 0 &&
!(value & 0x01) /* T-Enb */
)
)
) {
sim->tmr.z_stat = sim->tmr.counter != 0;
sim->cpu.irq &= ~0x0002;
}
/* Hardware bug: decrement on switch to 20us mode */
if (
!sim->tmr.t_clk_sel &&
(value & 0x10) && /* T-Clk-Sel */
sim->tmr.tick20 != 0
) {
tmrUpdate(sim, sim->tmr.counter == 0 ?
sim->tmr.reload : sim->tmr.counter - 1);
}
/* Parse fields */
sim->tmr.t_clk_sel = value >> 4 & 1;
sim->tmr.tim_z_int = value >> 3 & 1;
@@ -105,10 +132,8 @@ static void tmrWriteControl(VB *sim, uint8_t value) {
if (!sim->tmr.tim_z_int)
sim->cpu.irq &= ~0x0002;
/* Configure countdowns */
sim->tmr.clocks = sim->tmr.t_clk_sel ? 400 : 2000;
sim->tmr.until = sim->tmr.clocks * (sim->tmr.counter == 0 ?
(uint32_t) sim->tmr.reload + 1 : sim->tmr.counter);
/* Configure state */
sim->tmr.until = tmrGetUntil(sim);
/* TODO: Will Z-Stat raise an interrupt when Tim-Z-Int is set? */
}
@@ -117,12 +142,14 @@ static void tmrWriteControl(VB *sim, uint8_t value) {
static void tmrWriteHigh(VB *sim, uint8_t value) {
sim->tmr.reload = (uint16_t) value << 8 | (sim->tmr.reload & 0x00FF);
tmrUpdate(sim, sim->tmr.reload);
sim->tmr.until = tmrGetUntil(sim);
}
/* Write to the low data register */
static void tmrWriteLow(VB *sim, uint8_t value) {
sim->tmr.reload = (sim->tmr.reload & 0xFF00) | value;
tmrUpdate(sim, sim->tmr.reload);
sim->tmr.until = tmrGetUntil(sim);
}
+12 -6
View File
@@ -28,8 +28,9 @@ typedef struct {
uint8_t value; /* Master output level */
/* Other state */
uint32_t clocks; /* Clocks until modification */
uint8_t reload; /* Automatic reload value */
uint32_t clocks; /* Clocks until modification */
uint8_t modmask; /* Modifications masked */
uint8_t reload; /* Automatic reload value */
} env;
/* Frequency */
@@ -251,6 +252,7 @@ struct VB {
uint32_t clocks; /* Master clocks to wait */
uint16_t counter; /* Current counter value */
uint16_t reload; /* Reload counter value */
uint8_t tick20; /* Current 20-microsecond tick */
uint32_t until; /* Clocks until interrupt condition */
} tmr;
@@ -311,6 +313,7 @@ struct VB {
int frame; /* FRMCYC counter */
int32_t halfword; /* Current output halfword offset */
int step; /* Processing phase */
uint8_t toggle; /* Switch frame buffers next frame */
uint32_t until; /* Clocks until interrupt condition */
} xp;
@@ -325,6 +328,7 @@ struct VB {
uint16_t spt[4]; /* Object control */
/* Rendering shadow memory */
uint8_t buffer; /* Output buffer */
uint16_t halfwords[384*28]; /* Output timing by 1x8 halfword */
Pixels output[2]; /* Output images, row-major */
Pixels shadow; /* Drawing shadow image, column-major */
@@ -356,9 +360,11 @@ struct VB {
uint8_t shift; /* Sweep shift amount */
/* Other state */
uint32_t clocks; /* Clocks until modification */
uint16_t next; /* Next frequency value */
int sample; /* Current sample index */
uint32_t clocks; /* Clocks until modification */
uint8_t freqmask; /* Frequency mask */
uint8_t modmask; /* Modifications masked */
uint16_t next; /* Next frequency value */
int sample; /* Current sample index */
} freqmod;
/* Channel 6 noise generator */
@@ -631,7 +637,7 @@ VBAPI void vbGetPixels(VB *sim, void *left, int leftStrideX, int leftStrideY,
continue;
/* Transfer pixels to the destination */
src = sim->vip.output[sim->vip.dp.buffer ^ 1][i];
src = sim->vip.output[sim->vip.buffer][i];
for (y = 0; y < 224; y++, dest += yStride)
for (x = offset = 0; x < 384; x++, offset += xStride)
dest[offset] = *src++;
-1
View File
@@ -126,7 +126,6 @@ typedef int (*vbOnWrite )(VB *sim, uint32_t address, int type, int32_t *valu
VBAPI int vbEmulate (VB *sim, uint32_t *clocks);
VBAPI int vbEmulateEx (VB **sims, unsigned count, uint32_t *clocks);
VBAPI void* vbGetCallback (VB *sim, int id);
VBAPI void* vbGetCartRAM (VB *sim, uint32_t *size);
VBAPI void* vbGetCartROM (VB *sim, uint32_t *size);
VBAPI vbOnException vbGetExceptionCallback(VB *sim);
+62 -43
View File
@@ -42,14 +42,15 @@ static const uint8_t BG_TEMPLATES[][64] = {
/* 8-bit color magnitude by brightness level */
static const uint8_t BRIGHT8[] = {
0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30,
32, 34, 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62,
64, 66, 68, 70, 72, 74, 76, 78, 80, 82, 84, 86, 88, 90, 92, 94,
96, 98,100,102,104,106,108,110,112,114,116,118,120,122,124,126,
129,131,133,135,137,139,141,143,145,147,149,151,153,155,157,159,
161,163,165,167,169,171,173,175,177,179,181,183,185,187,189,191,
193,195,197,199,201,203,205,207,209,211,213,215,217,219,221,223,
225,227,229,231,233,235,237,239,241,243,245,247,249,251,253,255
0, 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 28,
30, 32, 34, 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 57, 59,
61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 86, 88, 90,
92, 94, 96, 98,100,102,104,106,108,110,112,113,115,117,119,121,
123,125,127,129,131,133,135,137,139,141,142,144,146,148,150,152,
154,156,158,160,162,164,166,168,170,171,173,175,177,179,181,183,
185,187,189,191,193,195,197,198,200,202,204,206,208,210,212,214,
216,218,220,222,224,226,227,229,231,233,235,237,239,241,243,245,
247,249,251,253,255
};
@@ -234,7 +235,7 @@ static void vipWriteCell(VB *sim, uint32_t offset, int type, int32_t value) {
case VB_S8:
case VB_U8:
value = offset & 1 ?
value << 8 | sim->vip.ram[0x20000 | offset] :
value << 8 | sim->vip.ram[0x20001 ^ offset] :
value | (int32_t) sim->vip.ram[0x20001 | offset] << 8
;
break;
@@ -284,7 +285,7 @@ static void vipWriteObject(VB *sim, uint32_t offset, int type, int32_t value) {
case VB_S8:
case VB_U8:
value = offset & 1 ?
value << 8 | sim->vip.ram[0x3E000 | offset] :
value << 8 | sim->vip.ram[0x3E001 ^ offset] :
value | (int32_t) sim->vip.ram[0x3E001 | offset] << 8
;
break;
@@ -326,7 +327,7 @@ static void vipWriteWorld(VB *sim, uint32_t offset, int type, int32_t value) {
case VB_S8:
case VB_U8:
value = offset & 1 ?
value << 8 | sim->vip.ram[0x3D800 | offset] :
value << 8 | sim->vip.ram[0x3D801 ^ offset] :
value | (int32_t) sim->vip.ram[0x3D801 | offset] << 8
;
break;
@@ -481,10 +482,12 @@ static void vipWriteIO(
break;
case 0x5F830>>1: /* CTA */
if ((mask & 0xFF00) == 0)
sim->vip.cta.cta_r = value >> 8;
if ((mask & 0x00FF) == 0)
sim->vip.cta.cta_l = value;
if (debug) {
if ((mask & 0xFF00) == 0)
sim->vip.cta.cta_r = value >> 8;
if ((mask & 0x00FF) == 0)
sim->vip.cta.cta_l = value;
}
break;
case 0x5F842>>1: /* XPCTRL */
@@ -544,7 +547,7 @@ static void vipWriteIO(
break;
case 0x5F870>>1: /* BKCOL */
sim->vip.bkcol = (sim->vip.bkcol & mask) | (value & 3 * ~mask);
sim->vip.bkcol = (sim->vip.bkcol & mask) | (value & 3 & ~mask);
break;
}
@@ -584,7 +587,7 @@ static void vipComputeBrightness(VB *sim) {
/* Transform brightness values to 0..255 */
for (x = 1; x < 4; x++)
sim->vip.dp.brt[x] = brt[x] > 127 ? 255 : BRIGHT8[brt[x]];
sim->vip.dp.brt[x] = brt[x] > 132 ? 255 : BRIGHT8[brt[x]];
}
/* Transfer one column of frame buffer pixels to output */
@@ -596,7 +599,7 @@ static void vipTransferColumn(VB *sim, int32_t eye) {
/* Select destination address in host memory */
dest = &sim->vip.output
[sim->vip.dp.buffer][eye][sim->vip.dp.column];
[sim->vip.buffer ^ 1][eye][sim->vip.dp.column];
/* Output is disabled */
if (!sim->vip.dp.enabled) {
@@ -652,28 +655,29 @@ static int vipEmulateDisplay(VB *sim, uint32_t clocks) {
vipThrow(sim, 0x0010); /* FRAMESTART */
/* Game frame */
if (sim->vip.xp.xpen) {
if (sim->vip.xp.frame >= sim->vip.frmcyc) {
sim->vip.xp.frame = 0;
if (sim->vip.xp.frame >= sim->vip.frmcyc) {
sim->vip.xp.frame = 0;
/* Initiate drawing procedure */
if (sim->vip.xp.step == 0) {
sim->vip.dp.buffer ^= 1;
sim->vip.xp.enabled = 1;
sim->vip.xp.overtime = 0;
sim->vip.xp.step = 1;
vipThrow(sim, 0x0008); /* GAMESTART */
}
vipThrow(sim, 0x0008); /* GAMESTART */
if (sim->vip.xp.step != 0) {
sim->vip.xp.overtime = 1;
vipThrow(sim, 0x8000); /* TIMEERR */
}
/* Drawing procedure has run into overtime */
else {
sim->vip.xp.overtime = 1;
vipThrow(sim, 0x8000); /* TIMEERR */
}
/* Initiate drawing procedure */
else if (sim->vip.xp.xpen) {
sim->vip.dp.buffer ^= sim->vip.xp.toggle;
sim->vip.xp.enabled = 1;
sim->vip.xp.overtime = 0;
sim->vip.xp.step = 1;
sim->vip.xp.toggle = 0;
}
} else sim->vip.xp.frame++;
}
/* Not a game frame */
else sim->vip.xp.frame++;
break;
/* 0ms-3ms - Idle */
@@ -765,6 +769,7 @@ static int vipEmulateDisplay(VB *sim, uint32_t clocks) {
/* 18ms-20ms - Idle */
case 8: /* 20ms - Display interval complete */
sim->vip.buffer ^= 1;
sim->vip.dp.step = 0;
if (vipOnFrame(sim))
return 1;
@@ -1056,8 +1061,8 @@ static void vipDrawAffine(VB *sim, World *world) {
/* Adjust left-edge parameters */
if ((mp < 0) ^ i) {
mx += dx * (wx - mp);
my += dy * (wx - mp);
mx += dx * (wx + mp);
my += dy * (wx + mp);
} else {
mx += dx * wx;
my += dy * wx;
@@ -1262,6 +1267,7 @@ static void vipEmulateDrawing(VB *sim, uint32_t clocks) {
case 4: /* Drawing complete */
sim->vip.xp.enabled = 0;
sim->vip.xp.step = 0;
sim->vip.xp.toggle = 1;
if (sim->vip.dp.buffer == 0)
sim->vip.xp.f1bsy = 0;
else sim->vip.xp.f0bsy = 0;
@@ -1311,8 +1317,13 @@ static void vipRead(VB *sim, uint32_t address, int type, int32_t *value) {
*value = 0;
/* I/O register */
else if (address < 0x60000)
else if (address < 0x60000) {
*value = vipReadIO(sim, address, type);
switch (type) {
case VB_S8 : *value = (int8_t ) *value; break;
case VB_S16: *value = (int16_t) *value; break;
}
}
/* Unmapped */
else if (address < 0x78000)
@@ -1328,11 +1339,11 @@ static void vipRead(VB *sim, uint32_t address, int type, int32_t *value) {
/* Simulate a hardware reset */
static void vipReset(VB *sim) {
Cell *cell; /* BG map cell state */
Character *chr; /* Character state */
Object *obj; /* Object state */
World *world; /* World state */
int x, y; /* Iterators */
Cell *cell; /* BG map cell state */
Character *chr; /* Character state */
Object *obj; /* Object state */
World *world; /* World state */
int x, y, z; /* Iterators */
/* Normal */
sim->vip.intenb = 0x0000;
@@ -1422,6 +1433,13 @@ static void vipReset(VB *sim) {
sim->vip.xp.sbcount = 0;
sim->vip.xp.sbout = 0;
/* Other */
sim->vip.buffer = 0;
for (x = 0; x < 2; x++)
for (y = 0; y < 2; y++)
for (z = 0; z < 384*224; z++)
sim->vip.output[x][y][z] = 0;
/* Display processor other */
sim->vip.dp.brt[0] = 0;
sim->vip.dp.buffer = 0; /* TODO: Hardware might actually do this */
@@ -1432,6 +1450,7 @@ static void vipReset(VB *sim) {
/* Pixel processor other */
sim->vip.xp.clocks = 0;
sim->vip.xp.step = 0;
sim->vip.xp.toggle = 0;
sim->vip.xp.until = 0;
}
+104 -35
View File
@@ -45,9 +45,28 @@ static void vsuOnSamples(VB *sim) {
/***************************** Module Functions ******************************/
/* Determine while frequency modifications should be processed */
static uint8_t vsuCheckFreqMod(VB *sim) {
return
sim->vsu.freqmod.enb &&
sim->vsu.freqmod.interval != 0 && (
sim->vsu.freqmod.modmask != 2 || (
sim->vsu.freqmod.func == 1 &&
sim->vsu.freqmod.rep
)
)
;
}
/* Stage the next frequency modification value */
static void vsuNextFreqMod(VB *sim, Channel *chan) {
uint16_t next;
int32_t next;
/* Modulation mask control */
if (sim->vsu.freqmod.modmask == 1 && sim->vsu.freqmod.func == 1) {
sim->vsu.freqmod.modmask = 2;
chan->freqmod = vsuCheckFreqMod(sim);
}
/* Sweep */
if (sim->vsu.freqmod.func == 0) {
@@ -57,25 +76,37 @@ static void vsuNextFreqMod(VB *sim, Channel *chan) {
else next = chan->freq.current + next;
if (next > 2047)
chan->int_.enb = 0;
if (next < 0)
next = 0;
}
/* Modulation */
else {
next = (chan->freq.written +
sim->vsu.modulation[sim->vsu.freqmod.sample]) & 2047;
if (sim->vsu.freqmod.sample != 31)
sim->vsu.freqmod.sample++;
else if (sim->vsu.freqmod.rep)
sim->vsu.freqmod.sample = 0;
next = ((int32_t) chan->freq.written +
sim->vsu.modulation[sim->vsu.freqmod.sample]) & 0x7FF;
if (sim->vsu.freqmod.freqmask == 1)
next = (next & 0x700) | (chan->freq.written & 0x0FF);
else if (sim->vsu.freqmod.freqmask == 2)
next = (next & 0x0FF) | (chan->freq.written & 0x700);
}
/* Configure state */
sim->vsu.freqmod.next = next;
if (chan->freqmod)
sim->vsu.freqmod.next = next;
}
/* Advance the noise channel's shift register */
static void vsuNextNoise(VB *sim) {
uint32_t bit = ((
sim->vsu.noise.register_ >> NOISE_TAPS[sim->vsu.noise.tap] ^
sim->vsu.noise.register_ >> 7
) & 1) ^ 1;
sim->vsu.noise.register_ = bit |
(sim->vsu.noise.register_ << 1 & 0x7FFE);
}
/* Process one channel */
static void vsuEmulateChannel(VB *sim, Channel *chan) {
uint32_t bit; /* Pseudorandom bit */
/* Automatic shutoff */
if (chan->int_.auto_ && chan->int_.clocks == 0) {
@@ -95,35 +126,55 @@ static void vsuEmulateChannel(VB *sim, Channel *chan) {
/* Noise */
else {
chan->clocks = 40 * (2048 - (uint32_t) chan->freq.current);
bit = ((
sim->vsu.noise.register_ >> NOISE_TAPS[sim->vsu.noise.tap]^
sim->vsu.noise.register_ >> 7
) & 1) ^ 1;
sim->vsu.noise.register_ = bit |
(sim->vsu.noise.register_ << 1 & 0x7FFE);
vsuNextNoise(sim);
}
}
/* Envelope modification */
if (chan->env.enb && chan->env.clocks == 0) {
if (chan->env.enb && !chan->env.modmask && chan->env.clocks == 0) {
if (chan->env.dir == 0 && chan->env.value != 0)
chan->env.value--;
else if (chan->env.dir == 1 && chan->env.value != 15)
chan->env.value++;
else if (chan->env.rep)
chan->env.value = chan->env.reload;
else chan->env.modmask = 1;
chan->env.clocks = ((uint32_t) chan->env.interval + 1) * 307220;
}
/* Frequency modification */
if (chan->freqmod && sim->vsu.freqmod.clocks == 0) {
chan->freq.current = sim->vsu.freqmod.next;
vsuNextFreqMod(sim, chan);
if (chan == &sim->vsu.channels[4] && sim->vsu.freqmod.clocks == 0) {
/* Apply previously computed frequency modification */
if (chan->freqmod)
chan->freq.current = sim->vsu.freqmod.next;
/* Channel itself is disabled */
if (!chan->int_.enb)
return;
sim->vsu.freqmod.clocks = (uint32_t) sim->vsu.freqmod.interval *
(sim->vsu.freqmod.clk == 0 ? 19200 : 153600);
/* Frequency modifications are enabled */
if (chan->freqmod) {
/* Not the final modulation sample */
if (sim->vsu.freqmod.sample != 31)
sim->vsu.freqmod.sample++;
/* Last modulation sample processed */
else {
sim->vsu.freqmod.modmask = 1;
if (sim->vsu.freqmod.rep)
sim->vsu.freqmod.sample = 0;
}
/* Schedule next modification */
sim->vsu.freqmod.clocks = (uint32_t) sim->vsu.freqmod.interval *
(sim->vsu.freqmod.clk == 0 ? 19200 : 153600);
}
/* Always process and validate next frequency value */
vsuNextFreqMod(sim, chan);
}
}
@@ -164,8 +215,10 @@ static void vsuWriteEV0(VB *sim, int index, uint8_t value) {
chan->env.interval = value & 7;
chan->env.value = value >> 4 & 15;
chan->env.reload = chan->env.value;
if (index == 4)
if (index == 4) {
chan->freqmod = vsuCheckFreqMod(sim);
vsuNextFreqMod(sim, chan);
}
/* Configure state */
chan->env.clocks = 307220 * ((uint32_t) chan->env.interval + 1);
@@ -186,14 +239,14 @@ static void vsuWriteEV1(VB *sim, int index, uint8_t value) {
sim->vsu.freqmod.enb = value >> 6 & 1;
sim->vsu.freqmod.func = value >> 4 & 1;
sim->vsu.freqmod.rep = value >> 5 & 1;
chan->freqmod = vsuCheckFreqMod(sim);
vsuNextFreqMod(sim, chan);
chan->freqmod =
sim->vsu.freqmod.enb && sim->vsu.freqmod.interval != 0;
break;
case 5: /* Channel 6 */
sim->vsu.noise.tap = value >> 4 & 7;
sim->vsu.noise.register_ = 0x0000;
vsuNextNoise(sim);
}
}
@@ -204,8 +257,10 @@ static void vsuWriteFQH(VB *sim, int index, uint16_t value) {
value = value << 8 & 0x0700;
chan->freq.current = (chan->freq.current & 0x00FF) | value;
chan->freq.written = (chan->freq.written & 0x00FF) | value;
if (index == 4)
vsuNextFreqMod(sim, chan);
if (index != 4)
return;
sim->vsu.freqmod.freqmask = 2;
vsuNextFreqMod(sim, chan);
}
/* Write a value to S*FQL */
@@ -213,8 +268,10 @@ static void vsuWriteFQL(VB *sim, int index, uint8_t value) {
Channel *chan = &sim->vsu.channels[index];
chan->freq.current = (chan->freq.current & 0x0700) | value;
chan->freq.written = (chan->freq.written & 0x0700) | value;
if (index == 4)
vsuNextFreqMod(sim, chan);
if (index != 4)
return;
sim->vsu.freqmod.freqmask = 1;
vsuNextFreqMod(sim, chan);
}
/* Write a value to S*INT */
@@ -228,6 +285,7 @@ static void vsuWriteINT(VB *sim, int index, uint8_t value) {
/* Update state */
chan->int_.clocks = 76805 * ((uint32_t) chan->int_.interval + 1);
chan->env.modmask = 0;
if (chan->env.enb)
chan->env.clocks = 307220 * ((uint32_t) chan->env.interval + 1);
if (index != 5) {
@@ -235,12 +293,16 @@ static void vsuWriteINT(VB *sim, int index, uint8_t value) {
chan->clocks = 4 * (2048 - (uint32_t) chan->freq.current);
} else {
sim->vsu.noise.register_ = 0x0000;
vsuNextNoise(sim);
chan->clocks = 40 * (2048 - (uint32_t) chan->freq.current);
}
if (index == 4) {
sim->vsu.freqmod.clocks = (uint32_t) sim->vsu.freqmod.interval *
(sim->vsu.freqmod.clk == 0 ? 19200 : 153600);
sim->vsu.freqmod.sample = 0;
sim->vsu.freqmod.modmask = 0;
sim->vsu.freqmod.sample = 0;
chan->freqmod = vsuCheckFreqMod(sim);
vsuNextFreqMod(sim, chan);
}
}
@@ -272,8 +334,8 @@ static void vsuWriteSWP(VB *sim, uint8_t value) {
(sim->vsu.freqmod.clk == 0 ? 19200 : 153600);
if (clocks < sim->vsu.freqmod.clocks)
sim->vsu.freqmod.clocks = clocks;
sim->vsu.channels[4].freqmod =
sim->vsu.freqmod.enb && sim->vsu.freqmod.interval != 0;
sim->vsu.channels[4].freqmod = vsuCheckFreqMod(sim);
vsuNextFreqMod(sim, &sim->vsu.channels[4]);
}
@@ -315,7 +377,8 @@ static void vsuEmulate(VB *sim, uint32_t clocks) {
/* Clocks until next state change */
chan->until = chan->clocks;
if (chan->env.enb && chan->env.clocks < chan->until)
if (chan->env.enb && !chan->env.modmask &&
chan->env.clocks < chan->until)
chan->until = chan->env.clocks;
if (chan->int_.auto_ && chan->int_.clocks < chan->until)
chan->until = chan->int_.clocks;
@@ -324,7 +387,7 @@ static void vsuEmulate(VB *sim, uint32_t clocks) {
/* Manage clocks */
chan->clocks -= chan->until;
if (chan->env.enb)
if (chan->env.enb && !chan->env.modmask)
chan->env.clocks -= chan->until;
if (chan->int_.auto_)
chan->int_.clocks -= chan->until;
@@ -427,6 +490,7 @@ static void vsuReset(VB *sim) {
chan->env.enb = 0;
chan->env.dir = 0;
chan->env.interval = 0;
chan->env.modmask = 0;
chan->env.reload = 0;
chan->env.rep = 0;
chan->env.value = 0;
@@ -447,8 +511,10 @@ static void vsuReset(VB *sim) {
sim->vsu.freqmod.clocks = 0;
sim->vsu.freqmod.dir = 0;
sim->vsu.freqmod.enb = 0;
sim->vsu.freqmod.freqmask = 0;
sim->vsu.freqmod.func = 0;
sim->vsu.freqmod.interval = 0;
sim->vsu.freqmod.modmask = 0;
sim->vsu.freqmod.next = 0;
sim->vsu.freqmod.rep = 0;
sim->vsu.freqmod.sample = 0;
@@ -475,11 +541,14 @@ static void vsuWrite(VB*sim,uint32_t address,int type,int32_t value,int debug){
}
/* Unmapped */
if (address & 3)
if (address & 1)
return;
/* Working variables */
address &= 0x7FF;
address &= 0x7FC;
/* Clear frequency mask */
sim->vsu.freqmod.freqmask = 0;
/* Wave memory */
if (address < 0x280) {
+4
View File
@@ -513,6 +513,8 @@ static int dasmLine(VB *sim, uint32_t *address, uint32_t pc,
line->isPC = *address == pc;
for (x = 0; x < line->codeLength; x++)
line->code[x] = vbRead(sim, *address + x, VB_U8);
/* Advance to the next instruction or PC, whichever is sooner */
*address += pc != *address && pc - *address < line->codeLength ?
pc - *address : line->codeLength;
@@ -657,6 +659,8 @@ static VBU_DasmLine* dasmDisassemble(VB *sim, uint32_t address,
size = vbuCodeSize(sim, addr);
if (address - addr < size)
break;
/* Advance to the next instruction or PC, whichever is sooner */
addr += addr != pc && pc - addr < size ? pc - addr : size;
}
+297
View File
@@ -0,0 +1,297 @@
/* This file is included into vbu.c and cannot be compiled on its own. */
#ifdef VBUAPI
/********************************* Constants *********************************/
/* Range types */
/*
0x41 ('A') 8-bit integer (.db), string
0x42 ('B') 8-bit integer (.db), numeric
0x43 ('C') Compiled C code
0x44 ('D') 16-bit integer (.dd, high byte first)
0x45 ('E') 65C816 code (8-bit accumulator, 8-bit index)
0x46 ('F') 65C816 code (8-bit accumulator, 16-bit index)
0x47 ('G') 65C816 code (16-bit accumulator, 8-bit index)
0x48 ('H') 65C816 code (16-bit accumulator, 16-bit index)
0x4C ('L') 32-bit integer (.dl SNES, .dw Virtual Boy, low byte first)
0x53 ('S') Size reservation, as in .bss allocation (.ds)
0x57 ('W') 16-bit integer (.dw SNES, .dh Virtual Boy, low byte first)
*/
/***************************** Module Functions ******************************/
/* Skip ISX record type 0x01 */
static size_t isx01(uint8_t *bytes, size_t length, size_t src) {
/*
u8 Type =0x01
u8 Bank Cartridge bank number
u8 BankHigh Only if Bank >= 0x80
u16 Address CPU bus address
u16 DataLength Number of bytes in Data
u8[] Data Code bytes
*/
/* Bank field is not present */
if (src + 2 > length)
return (size_t) -1;
/* Advance to DataLength field */
src += bytes[src + 1] >= 0x80 ? 5 : 4;
/* DataLength field is not present */
if (src + 2 > length)
return (size_t) -1;
/* Advance past Data field */
return src + 2 + ((uint16_t) bytes[src + 1] << 8 | bytes[src]);
}
/* Decode ISX record type 0x11 */
static size_t isx11(uint8_t *bytes, size_t length, size_t src,
uint32_t *address, uint32_t *size) {
/*
u8 Type =0x11
u32 Address CPU bus address
u32 DataLength Number of bytes in Data
u8[] Data Code bytes
*/
/* DataLength field is not present */
if (src + 9 > length)
return (size_t) -1;
/* Parse Address and DataLength fields */
*address = (uint32_t) bytes[src+4] << 24 | (uint32_t) bytes[src+3] << 16 |
(uint32_t) bytes[src+2] << 8 | bytes[src+1];
*size = (uint32_t) bytes[src+8] << 24 | (uint32_t) bytes[src+7] << 16 |
(uint32_t) bytes[src+6] << 8 | bytes[src+5];
/* Advance past Data field */
return src + 9 + *size;
}
/* Skip ISX range records */
static size_t isxRange(uint8_t *bytes,size_t length,size_t src,size_t size) {
/*
u8 Type =0x03 (SNES) or 0x13 (Virtual Boy)
u16 Count Number of ranges
Range[] Ranges
=== SNES fields ===
u8 Bank Cartridge bank number
u16 StartAddress Lowest CPU bus address
u16 EndAddress Highest CPU bus address
u8 RangeType See range types
=== Virtual Boy fields ===
u32 StartAddress Lowest CPU bus address
u32 EndAddress Highest CPU bus address
u8 RangeType See range types
*/
/* Count field is not present */
if (src + 3 > length)
return (size_t) -1;
/* Advance past Ranges field */
return src + 3 + size * ((uint16_t) bytes[src + 2] << 8 | bytes[src + 1]);
}
/* Skip ISX symbol record */
static size_t isxSymbol(uint8_t *bytes,size_t length,size_t src,size_t size) {
size_t count; /* Number of symbols */
size_t x; /* Iterator */
/*
u8 Type =0x04 (SNES) or 0x14 (Virtual Boy)
u16 Count Number of symbols
Symbol[] Symbols
u8 NameLength Number of bytes in Name
u8[] Name Symbol name
=== SNES fields ===
u8 Flags Undocumented
u8 Bank Cartridge bank number
u16 Address CPU bus address
=== Virtual Boy fields ===
u16 Flags Undocumented
u32 Address CPU bus address
*/
/* Count field is not present */
if (src + 3 > length)
return (size_t) -1;
/* Working variables */
count = (uint16_t) bytes[src + 2] << 8 | bytes[src + 1];
src += 3;
/* Process all symbols */
for (x = 0; x < count; x++) {
/* NameLength field is not present */
if (src > length)
return (size_t) -1;
/* Advance past remainder of symbol */
src += size + bytes[src];
/* Remainder of symbol is not present */
if (src > length)
return (size_t) -1;
}
return src;
}
/* Skip ISX system record */
static size_t isxSystem(uint8_t *bytes, size_t length, size_t src) {
/*
u8 Type =0x20, 0x21 or 0x22
u32 DataLength Number of bytes in Data
u8[] Data Record data
*/
/* DataLength field is not present */
if (src + 5 > length)
return (size_t) -1;
/* Advance past Data field */
return src + 5 + (
(uint32_t) bytes[src + 4] << 24 | (uint32_t) bytes[src + 3] << 16 |
(uint32_t) bytes[src + 2] << 8 | bytes[src + 1]
);
}
/***************************** Library Functions *****************************/
/* Decode an ISX debugger file to a Virtual Boy ROM */
static void* isxFrom(uint8_t *bytes, size_t length, size_t *romLength) {
uint32_t addr; /* Code record base address */
uint32_t highMin; /* Lowest address in upper half of ROM */
uint32_t lowMax; /* Highest address in lower half of ROM */
uint8_t *rom; /* Output ROM */
uint32_t size; /* Code record size in bytes */
size_t src; /* Input position */
size_t start; /* Offset of first record */
/* Error checking */
if (length < 3)
return NULL;
/* Working variables */
highMin = 0xFFFFFF;
lowMax = 0x000000;
size = 0;
start = strncmp((char *) bytes, "ISX", 3) ? 0 : 32;
/* First pass: determine the size of the ROM */
for (src = start; src < length;) {
switch (bytes[src]) {
case 0x11: /* Code (Virtual Boy) */
/* Decode record fields */
src = isx11(bytes, length, src, &addr, &size);
if (src > length)
return NULL;
/* Validate address and data size */
addr &= 0x07FFFFFF;
if (
addr < 0x07000000 ||
0x08000000 - addr < size
) return NULL;
addr &= 0x00FFFFFF;
/* Requires 16 MiB */
if (addr < 0x800000 && addr + size > 0x800000) {
highMin = 0x800000;
lowMax = 0x7FFFFF;
}
/* Map from top of ROM space */
else if (addr & 0x800000) {
if (addr < highMin)
highMin = addr;
}
/* Map from bottom of ROM space */
else {
addr += size - 1;
if (addr > lowMax)
lowMax = addr;
}
break;
case 0x01: /* Code (SNES) */
src = isx01 (bytes, length, src ); break;
case 0x03: /* Range (SNES) */
src = isxRange (bytes, length, src, 6); break;
case 0x04: /* Symbol (SNES) */
src = isxSymbol(bytes, length, src, 5); break;
case 0x13: /* Range (Virtual Boy) */
src = isxRange (bytes, length, src, 9); break;
case 0x14: /* Symbol (Virtual Boy) */
src = isxSymbol(bytes, length, src, 7); break;
case 0x20: /* System (undocumented) */
case 0x21: /* System (undocumented) */
case 0x22: /* System (undocumented) */
src = isxSystem(bytes, length, src ); break;
default: /* Invalid record type */
return NULL;
}
/* Record contains invalid data */
if (src > length)
return NULL;
}
/* Produce a ROM buffer of minimal size to fit all the code records */
for (
src = 1;
src < lowMax + 0x1000001 - highMin;
src <<= 1
);
rom = VBU_REALLOC(NULL, src);
if (rom == NULL)
return NULL;
*romLength = src;
memset(rom, 0x00, src);
/* Second pass: fill the ROM buffer with the code records */
for (src = start; src < length;) {
switch (bytes[src]) {
case 0x11: /* Code (Virtual Boy) */
src = isx11(bytes, length, src, &addr, &size);
memcpy(&rom[addr & (*romLength-1)], &bytes[src - size], size);
break;
case 0x01: /* Code (SNES) */
src = isx01 (bytes, length, src ); break;
case 0x03: /* Range (SNES) */
src = isxRange (bytes, length, src, 9); break;
case 0x04: /* Symbol (SNES) */
src = isxSymbol(bytes, length, src, 5); break;
case 0x13: /* Range (Virtual Boy) */
src = isxRange (bytes, length, src, 12); break;
case 0x14: /* Symbol (Virtual Boy) */
src = isxSymbol(bytes, length, src, 7); break;
case 0x20: /* System (undocumented) */
case 0x21: /* System (undocumented) */
case 0x22: /* System (undocumented) */
src = isxSystem(bytes, length, src ); break;
}
}
return rom;
}
#endif /* VBUAPI */
+6
View File
@@ -33,6 +33,7 @@ static int32_t SignExtend(int32_t value, int32_t bits) {
/******************************** Sub-Modules ********************************/
#include "disassembler.c"
#include "isx.c"
@@ -70,3 +71,8 @@ VBUAPI VBU_DasmLine* vbuDisassemble(VB *sim, uint32_t address,
VBU_DasmConfig *config, unsigned length, int line) {
return dasmDisassemble(sim, address, config, length, line);
}
/* Decode an ISX debugger file to a Virtual Boy ROM */
VBUAPI void* vbuFromISX(void *bytes, size_t length, size_t *romLength) {
return isxFrom(bytes, length, romLength);
}
+1
View File
@@ -88,6 +88,7 @@ typedef struct {
VBUAPI int vbuCodeSize (VB *sim, uint32_t address);
VBUAPI VBU_DasmConfig* vbuDasmInit (VBU_DasmConfig *config);
VBUAPI VBU_DasmLine* vbuDisassemble(VB *sim, uint32_t address, VBU_DasmConfig *config, unsigned length, int line);
VBUAPI void* vbuFromISX (void *bytes, size_t length, size_t *romLength);
-2
View File
@@ -1,7 +1,5 @@
"use strict";
//////////////////////////////////// Audio ////////////////////////////////////
// Dedicated audio output processor
class Audio extends AudioWorkletProcessor {
+2 -3
View File
@@ -1,4 +1,5 @@
let Constants = {
"use strict";
export default {
// Core
VB: {
@@ -85,5 +86,3 @@ let Constants = {
}
};
export { Constants };
+50 -8
View File
@@ -1,5 +1,5 @@
"use strict";
import { Constants } from "./Constants.js";
import Constants from /***/"./Constants.js";
@@ -87,11 +87,8 @@ new class Core {
this.sims.set(sim.pointer, sim);
// Video
sim.pixels = this.#noalloc(
this.GetExtPixels(sim.pointer),
384*224*4, sim, "pixels", Uint8ClampedArray
);
sim.image = new ImageData(sim.pixels, 384, 224);
sim.pixels = this.#getPixels(sim);
sim.image = new ImageData(sim.pixels, 384, 224);
// Audio
sim.samples = this.#noalloc(
@@ -261,6 +258,41 @@ new class Core {
});
}
// Attempt to produce a ROM from an ISX debugger file
fromISX(message) {
// Transfer the input data into WebAssembly memory
let input = new Uint8Array(message.data);
let inPtr = this.Realloc(0, input.length);
let inMem = new Uint8Array(this.memory.buffer, inPtr, input.length);
for (let x = 0; x < input.length; x++)
inMem[x] = input[x];
// Attempt to decode the ISX file as a ROM
let outPtr = this.FromISX(inPtr, input.length);
this.Realloc(inPtr, 0);
// The data is not an ISX file
if (outPtr == 0) {
this.dom.postMessage({ promised: true, data: null });
return;
}
// Transfer the decoded ROM from WebAssembly memory
let output = new Uint8Array(this.GetISXLength(outPtr));
let outMem = new Uint8Array(this.memory.buffer,
this.GetISXROM(outPtr), output.length);
for (let x = 0; x < output.length; x++)
output[x] = outMem[x];
this.Realloc(outPtr, 0);
// Notify DOM thread
this.dom.postMessage({
promised: true,
data : output.buffer
}, [ output.buffer ]);
}
// Specify anaglyph colors
setAnaglyph(message) {
this.SetAnaglyph(message.sim, message.left, message.right);
@@ -364,8 +396,10 @@ new class Core {
this.mallocs.set(buffer.pointer, buffer);
this.#updateTarget(buffer);
}
for (let sim of this.sims)
sim.image = new ImageData(sim.pixels, 384, 224);
for (let sim of this.sims.values()) {
sim.pixels = this.#getPixels(sim);
sim.image = new ImageData(sim.pixels, 384, 224);
}
}
@@ -436,6 +470,14 @@ new class Core {
this.Realloc(buffer.pointer, 0);
}
// Register a sim's pixel buffer
#getPixels(sim) {
return this.#noalloc(
this.GetExtPixels(sim.pointer),
384*224*4, sim, "pixels", Uint8ClampedArray
);
}
// Allocate memory in WebAssembly and register the buffer
#malloc(count, target = null, assign = null, type = Uint8ClampedArray) {
return this.#noalloc(
+24 -2
View File
@@ -1,5 +1,5 @@
"use strict";
import { Constants } from "./Constants.js";
import Constants from /**/"./Constants.js";
// Instantiation guard
const GUARD = Symbol();
@@ -864,6 +864,28 @@ class VB {
return true;
}
// Decode an ISX debugger file to a Virtual Boy ROM
async fromISX(data) {
// Validation
if (data instanceof ArrayBuffer)
data = new Uint8Array(data);
if (
!(data instanceof Uint8Array) &&
!(data instanceof Uint8ClampedArray)
) data = Uint8Array.from(data);
// Send the memory to the core
data = data.slice();
let response = await this.#toCore({
command : "fromISX",
promised : true,
data : data.buffer,
transfers: [ data.buffer ]
});
return response.data == null ? null : new Uint8Array(response.data);
}
// Suspend automatic emulation
async suspend() {
@@ -932,4 +954,4 @@ class VB {
}
export { VB };
export default VB;