Compare commits
2
Commits
| Author | SHA1 | Date | |
|---|---|---|---|
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bc864644f7 | ||
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e97b52e944 |
@@ -91,11 +91,6 @@
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#define CPU_XORBSU 82
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#define CPU_XORBSU 82
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#define CPU_XORNBSU 83
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#define CPU_XORNBSU 83
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/* Functional operand types */
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#define CPU_LITERAL 0
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#define CPU_MEMORY 1
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#define CPU_REGISTER 2
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/* Bit string operations */
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/* Bit string operations */
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#define CPU_AND_BS 0
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#define CPU_AND_BS 0
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#define CPU_ANDN_BS 1
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#define CPU_ANDN_BS 1
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@@ -64,7 +64,9 @@ typedef struct {
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} wave;
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} wave;
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/* Other state */
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/* Other state */
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uint32_t clocks; /* Clocks until next sample */
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uint32_t clocks; /* Clocks until next wave or noise sample */
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uint8_t freqmod; /* Frequency modifications are active */
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uint32_t until; /* Clocks until channel component update */
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} Channel;
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} Channel;
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/* Simulation state */
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/* Simulation state */
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@@ -643,6 +645,7 @@ VBAPI vbOnWrite vbGetWriteCallback(VB *sim) {
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VBAPI VB* vbInit(VB *sim) {
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VBAPI VB* vbInit(VB *sim) {
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sim->cart.ram = NULL;
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sim->cart.ram = NULL;
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sim->cart.rom = NULL;
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sim->cart.rom = NULL;
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sim->ph.enabled = 0;
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sim->vsu.out.samples = NULL;
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sim->vsu.out.samples = NULL;
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sim->onExecute = NULL;
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sim->onExecute = NULL;
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sim->onFetch = NULL;
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sim->onFetch = NULL;
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@@ -652,7 +655,7 @@ VBAPI VB* vbInit(VB *sim) {
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sim->onSamples = NULL;
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sim->onSamples = NULL;
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sim->onWrite = NULL;
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sim->onWrite = NULL;
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sim->peer = NULL;
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sim->peer = NULL;
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sim->ph.enabled = 0;
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sim->tag = NULL;
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vbReset(sim);
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vbReset(sim);
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return sim;
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return sim;
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}
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}
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@@ -716,28 +719,28 @@ VBAPI int vbSetCartROM(VB *sim, void *rom, uint32_t size) {
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/* Specify a new exception callback handler */
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/* Specify a new exception callback handler */
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VBAPI vbOnException vbSetExceptionCallback(VB *sim, vbOnException callback) {
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VBAPI vbOnException vbSetExceptionCallback(VB *sim, vbOnException callback) {
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vbOnException prev = sim->onException;
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vbOnException prev = sim->onException;
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sim->onException = callback;
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sim->onException = callback;
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return prev;
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return prev;
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}
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}
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/* Specify a new execute callback handler */
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/* Specify a new execute callback handler */
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VBAPI vbOnExecute vbSetExecuteCallback(VB *sim, vbOnExecute callback) {
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VBAPI vbOnExecute vbSetExecuteCallback(VB *sim, vbOnExecute callback) {
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vbOnExecute prev = sim->onExecute;
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vbOnExecute prev = sim->onExecute;
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sim->onExecute = callback;
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sim->onExecute = callback;
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return prev;
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return prev;
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}
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}
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/* Specify a new fetch callback handler */
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/* Specify a new fetch callback handler */
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VBAPI vbOnFetch vbSetFetchCallback(VB *sim, vbOnFetch callback) {
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VBAPI vbOnFetch vbSetFetchCallback(VB *sim, vbOnFetch callback) {
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vbOnFetch prev = sim->onFetch;
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vbOnFetch prev = sim->onFetch;
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sim->onFetch = callback;
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sim->onFetch = callback;
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return prev;
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return prev;
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}
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}
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/* Specify a new frame callback handler */
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/* Specify a new frame callback handler */
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VBAPI vbOnFrame vbSetFrameCallback(VB *sim, vbOnFrame callback) {
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VBAPI vbOnFrame vbSetFrameCallback(VB *sim, vbOnFrame callback) {
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vbOnFrame prev = sim->onFrame;
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vbOnFrame prev = sim->onFrame;
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sim->onFrame = callback;
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sim->onFrame = callback;
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return prev;
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return prev;
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}
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}
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@@ -749,7 +752,7 @@ VBAPI uint16_t vbSetKeys(VB *sim, uint16_t keys) {
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/* Specify a new link callback handler */
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/* Specify a new link callback handler */
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VBAPI vbOnLink vbSetLinkCallback(VB *sim, vbOnLink callback) {
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VBAPI vbOnLink vbSetLinkCallback(VB *sim, vbOnLink callback) {
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vbOnLink prev = sim->onLink;
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vbOnLink prev = sim->onLink;
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sim->onLink = callback;
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sim->onLink = callback;
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return prev;
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return prev;
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}
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}
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@@ -774,6 +777,8 @@ VBAPI int vbSetOption(VB *sim, int key, int value) {
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VBAPI void vbSetPeer(VB *sim, VB *peer) {
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VBAPI void vbSetPeer(VB *sim, VB *peer) {
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if (sim->peer == peer)
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if (sim->peer == peer)
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return;
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return;
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if (sim->peer != NULL)
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sim->peer->peer = NULL;
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sim->peer = peer;
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sim->peer = peer;
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if (peer == NULL)
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if (peer == NULL)
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return;
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return;
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@@ -784,6 +789,7 @@ VBAPI void vbSetPeer(VB *sim, VB *peer) {
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/* Specify a new value for the program counter */
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/* Specify a new value for the program counter */
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VBAPI uint32_t vbSetProgramCounter(VB *sim, uint32_t value) {
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VBAPI uint32_t vbSetProgramCounter(VB *sim, uint32_t value) {
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sim->cpu.clocks = 0;
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sim->cpu.operation = CPU_FETCH;
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sim->cpu.operation = CPU_FETCH;
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sim->cpu.pc = sim->cpu.nextPC = value & 0xFFFFFFFE;
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sim->cpu.pc = sim->cpu.nextPC = value & 0xFFFFFFFE;
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sim->cpu.step = 0;
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sim->cpu.step = 0;
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@@ -798,7 +804,7 @@ VBAPI int32_t vbSetProgramRegister(VB *sim, unsigned index, int32_t value) {
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/* Specify a new read callback handler */
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/* Specify a new read callback handler */
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VBAPI vbOnRead vbSetReadCallback(VB *sim, vbOnRead callback) {
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VBAPI vbOnRead vbSetReadCallback(VB *sim, vbOnRead callback) {
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vbOnRead prev = sim->onRead;
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vbOnRead prev = sim->onRead;
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sim->onRead = callback;
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sim->onRead = callback;
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return prev;
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return prev;
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}
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}
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@@ -829,7 +835,7 @@ VBAPI uint32_t vbSetSystemRegister(VB *sim, unsigned index, uint32_t value) {
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/* Specify a new write callback handler */
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/* Specify a new write callback handler */
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VBAPI vbOnWrite vbSetWriteCallback(VB *sim, vbOnWrite callback) {
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VBAPI vbOnWrite vbSetWriteCallback(VB *sim, vbOnWrite callback) {
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vbOnWrite prev = sim->onWrite;
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vbOnWrite prev = sim->onWrite;
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sim->onWrite = callback;
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sim->onWrite = callback;
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return prev;
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return prev;
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}
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}
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@@ -841,7 +847,7 @@ VBAPI size_t vbSizeOf() {
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/* Specify a simulation's userdata pointer */
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/* Specify a simulation's userdata pointer */
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VBAPI void* vbSetUserData(VB *sim, void *tag) {
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VBAPI void* vbSetUserData(VB *sim, void *tag) {
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void *prev = sim->tag;
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void *prev = sim->tag;
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sim->tag = tag;
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sim->tag = tag;
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return prev;
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return prev;
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}
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}
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+96
-89
@@ -74,100 +74,57 @@ static void vsuNextFreqMod(VB *sim, Channel *chan) {
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}
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}
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/* Process one channel */
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/* Process one channel */
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static void vsuEmulateChannel(VB *sim, int index, uint32_t clocks) {
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static void vsuEmulateChannel(VB *sim, Channel *chan, uint32_t clocks) {
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uint32_t bit; /* Pseudorandom bit */
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uint32_t bit; /* Pseudorandom bit */
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Channel *chan; /* Channel handle */
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int freqmod; /* Frequency modifications enabled */
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uint32_t until; /* Clocks to process sub-channel components */
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/* Select channel */
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/* Automatic shutoff */
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chan = &sim->vsu.channels[index];
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if (chan->int_.auto_ && chan->int_.clocks == 0) {
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chan->int_.enb = 0;
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/* Channel is disabled */
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if (!chan->int_.enb)
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return;
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return;
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}
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/* Frequency modifications are active */
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/* Next input sample */
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freqmod =
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if (chan->clocks == 0) {
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index == 4 && /* Channel 5 */
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sim->vsu.freqmod.enb && /* Modifications enabled */
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sim->vsu.freqmod.interval != 0 /* Modifications valid */
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;
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/* Process all clocks */
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/* Wave */
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do {
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if (chan != &sim->vsu.channels[5]) {
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chan->clocks = 4 * (2048 - (uint32_t) chan->freq.current);
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chan->wave.sample = (chan->wave.sample + 1) & 31;
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}
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/* Clocks until next state change */
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/* Noise */
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until = clocks;
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else {
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if (chan->clocks < until)
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chan->clocks = 40 * (2048 - (uint32_t) chan->freq.current);
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until = chan->clocks;
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bit = ((
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if (chan->env.enb && chan->env.clocks < until)
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sim->vsu.noise.register_ >> NOISE_TAPS[sim->vsu.noise.tap]^
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until = chan->env.clocks;
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sim->vsu.noise.register_ >> 7
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if (chan->int_.auto_ && chan->int_.clocks < until)
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) & 1) ^ 1;
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until = chan->int_.clocks;
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sim->vsu.noise.register_ = bit |
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if (freqmod && sim->vsu.freqmod.clocks < until)
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(sim->vsu.noise.register_ << 1 & 0x7FFE);
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until = sim->vsu.freqmod.clocks;
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}
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/* Manage clocks */
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}
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clocks -= until;
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chan->clocks -= until;
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if (chan->env.enb)
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chan->env.clocks -= until;
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if (chan->int_.auto_)
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chan->int_.clocks -= until;
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if (freqmod)
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sim->vsu.freqmod.clocks -= until;
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/* Automatic shutoff */
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/* Envelope modification */
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if (chan->int_.auto_ && chan->int_.clocks == 0) {
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if (chan->env.enb && chan->env.clocks == 0) {
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chan->int_.enb = 0;
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if (chan->env.dir == 0 && chan->env.value != 0)
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chan->env.value--;
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else if (chan->env.dir == 1 && chan->env.value != 15)
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chan->env.value++;
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else if (chan->env.rep)
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chan->env.value = chan->env.reload;
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chan->env.clocks = ((uint32_t) chan->env.interval + 1) * 307220;
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}
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/* Frequency modification */
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if (chan->freqmod && sim->vsu.freqmod.clocks == 0) {
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chan->freq.current = sim->vsu.freqmod.next;
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vsuNextFreqMod(sim, chan);
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if (!chan->int_.enb)
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return;
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return;
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}
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sim->vsu.freqmod.clocks = (uint32_t) sim->vsu.freqmod.interval *
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(sim->vsu.freqmod.clk == 0 ? 19200 : 153600);
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/* Next sample */
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}
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if (chan->clocks == 0) {
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/* Wave */
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if (index != 5) {
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chan->clocks = 4 * (2048 - (uint32_t) chan->freq.current);
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chan->wave.sample = (chan->wave.sample + 1) & 31;
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}
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/* Noise */
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else {
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chan->clocks = 40 * (2048 - (uint32_t) chan->freq.current);
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bit = ((
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sim->vsu.noise.register_ >> NOISE_TAPS[sim->vsu.noise.tap]^
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sim->vsu.noise.register_ >> 7
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) & 1) ^ 1;
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sim->vsu.noise.register_ = bit |
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(sim->vsu.noise.register_ << 1 & 0x7FFE);
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}
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}
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/* Envelope modification */
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if (chan->env.enb && chan->env.clocks == 0) {
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if (chan->env.dir == 0 && chan->env.value != 0)
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chan->env.value--;
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else if (chan->env.dir == 1 && chan->env.value != 15)
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chan->env.value++;
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else if (chan->env.rep)
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chan->env.value = chan->env.reload;
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chan->env.clocks = ((uint32_t) chan->env.interval + 1) * 307220;
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}
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/* Frequency modification */
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if (freqmod && sim->vsu.freqmod.clocks == 0) {
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chan->freq.current = sim->vsu.freqmod.next;
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vsuNextFreqMod(sim, chan);
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if (!chan->int_.enb)
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return;
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sim->vsu.freqmod.clocks = (uint32_t) sim->vsu.freqmod.interval *
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(sim->vsu.freqmod.clk == 0 ? 19200 : 153600);
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}
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} while (clocks != 0);
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}
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}
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@@ -230,6 +187,8 @@ static void vsuWriteEV1(VB *sim, int index, uint8_t value) {
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sim->vsu.freqmod.func = value >> 4 & 1;
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sim->vsu.freqmod.func = value >> 4 & 1;
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sim->vsu.freqmod.rep = value >> 5 & 1;
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sim->vsu.freqmod.rep = value >> 5 & 1;
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vsuNextFreqMod(sim, chan);
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vsuNextFreqMod(sim, chan);
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chan->freqmod =
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sim->vsu.freqmod.enb && sim->vsu.freqmod.interval != 0;
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break;
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break;
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case 5: /* Channel 6 */
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case 5: /* Channel 6 */
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@@ -313,6 +272,8 @@ static void vsuWriteSWP(VB *sim, uint8_t value) {
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(sim->vsu.freqmod.clk == 0 ? 19200 : 153600);
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(sim->vsu.freqmod.clk == 0 ? 19200 : 153600);
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if (clocks < sim->vsu.freqmod.clocks)
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if (clocks < sim->vsu.freqmod.clocks)
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sim->vsu.freqmod.clocks = clocks;
|
sim->vsu.freqmod.clocks = clocks;
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sim->vsu.channels[4].freqmod =
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sim->vsu.freqmod.enb && sim->vsu.freqmod.interval != 0;
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}
|
}
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||||||
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@@ -321,6 +282,8 @@ static void vsuWriteSWP(VB *sim, uint8_t value) {
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|
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/* Process component */
|
/* Process component */
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||||||
static void vsuEmulate(VB *sim, uint32_t clocks) {
|
static void vsuEmulate(VB *sim, uint32_t clocks) {
|
||||||
|
Channel *chan; /* Input channel */
|
||||||
|
uint32_t chantil; /* Clocks until next channel state update */
|
||||||
float i0; /* Current analog input sample */
|
float i0; /* Current analog input sample */
|
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float o0; /* Current analog output sample */
|
float o0; /* Current analog output sample */
|
||||||
uint16_t output[2]; /* Digital output samples */
|
uint16_t output[2]; /* Digital output samples */
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||||||
@@ -340,12 +303,54 @@ static void vsuEmulate(VB *sim, uint32_t clocks) {
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|||||||
sim->vsu.clocks -= until;
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sim->vsu.clocks -= until;
|
||||||
|
|
||||||
/* Process all channels */
|
/* Process all channels */
|
||||||
for (x = 0; x < 6; x++)
|
for (x = 0; x < 6; x++) {
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vsuEmulateChannel(sim, x, until);
|
chan = &sim->vsu.channels[x];
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|
chantil = until;
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||||||
|
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||||||
|
/* Process all clocks */
|
||||||
|
while (chan->int_.enb && chantil != 0) {
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||||||
|
|
||||||
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/* Determine when the next state change will occur */
|
||||||
|
if (chan->until == 0) {
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||||||
|
|
||||||
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/* Clocks until next state change */
|
||||||
|
chan->until = chan->clocks;
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||||||
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if (chan->env.enb && chan->env.clocks < chan->until)
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||||||
|
chan->until = chan->env.clocks;
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||||||
|
if (chan->int_.auto_ && chan->int_.clocks < chan->until)
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||||||
|
chan->until = chan->int_.clocks;
|
||||||
|
if (chan->freqmod && sim->vsu.freqmod.clocks < chan->until)
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||||||
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chan->until = sim->vsu.freqmod.clocks;
|
||||||
|
|
||||||
|
/* Manage clocks */
|
||||||
|
chan->clocks -= chan->until;
|
||||||
|
if (chan->env.enb)
|
||||||
|
chan->env.clocks -= chan->until;
|
||||||
|
if (chan->int_.auto_)
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||||||
|
chan->int_.clocks -= chan->until;
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||||||
|
if (chan->freqmod)
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||||||
|
sim->vsu.freqmod.clocks -= chan->until;
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||||||
|
}
|
||||||
|
|
||||||
|
/* Manage clocks */
|
||||||
|
if (chan->until > chantil) {
|
||||||
|
chan->until -= chantil;
|
||||||
|
chantil = 0;
|
||||||
|
} else {
|
||||||
|
chantil -= chan->until;
|
||||||
|
chan->until = 0;
|
||||||
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}
|
||||||
|
|
||||||
|
/* Update channel state */
|
||||||
|
if (chan->until == 0)
|
||||||
|
vsuEmulateChannel(sim, chan, chan->until);
|
||||||
|
}
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
/* Wait for the current sample to finish */
|
/* Wait for the current sample to finish */
|
||||||
if (sim->vsu.clocks != 0)
|
if (sim->vsu.clocks != 0)
|
||||||
continue;
|
return;
|
||||||
|
|
||||||
/* Compute the output sample */
|
/* Compute the output sample */
|
||||||
output[0] = output[1] = 0;
|
output[0] = output[1] = 0;
|
||||||
@@ -416,6 +421,8 @@ static void vsuReset(VB *sim) {
|
|||||||
for (x = 0; x < 6; x++) {
|
for (x = 0; x < 6; x++) {
|
||||||
chan = &sim->vsu.channels[x];
|
chan = &sim->vsu.channels[x];
|
||||||
chan->clocks = 0;
|
chan->clocks = 0;
|
||||||
|
chan->freqmod = 0;
|
||||||
|
chan->until = 0;
|
||||||
chan->env.clocks = 0;
|
chan->env.clocks = 0;
|
||||||
chan->env.enb = 0;
|
chan->env.enb = 0;
|
||||||
chan->env.dir = 0;
|
chan->env.dir = 0;
|
||||||
|
|||||||
Reference in New Issue
Block a user