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5 Commits
Author SHA1 Message Date
GuyPerfect b4feff41f0 Fix broken timer fix bug fixes 2024-12-26 13:23:56 -06:00
GuyPerfect 4449acada0 Fix timer clock computation 2024-12-26 12:57:44 -06:00
GuyPerfect 799ac9f51a Fix style check error 2024-12-26 12:28:10 -06:00
GuyPerfect b83b49221d Timer accuracy adjustments 2024-12-26 12:23:00 -06:00
GuyPerfect 27e926bd58 Fix byte writes to VIP cells, objects and worlds 2024-12-25 13:48:39 -06:00
3 changed files with 45 additions and 17 deletions
+39 -12
View File
@@ -5,6 +5,15 @@
/***************************** Module Functions ******************************/ /***************************** Module Functions ******************************/
/* Compute clocks until the next decrement to zero */
static uint32_t tmrGetUntil(VB *sim) {
uint32_t fullTick = sim->tmr.t_clk_sel ? 400 : 2000;
uint32_t thisTick = sim->tmr.clocks +
(sim->tmr.t_clk_sel ? 0 : 400 * (4 - sim->tmr.tick20));
return thisTick + fullTick *
(sim->tmr.counter == 0 ? sim->tmr.reload : sim->tmr.counter - 1);
}
/* Update the counter to a new value */ /* Update the counter to a new value */
static void tmrUpdate(VB *sim, uint16_t value) { static void tmrUpdate(VB *sim, uint16_t value) {
if (value == 0 && sim->tmr.counter != 0) { if (value == 0 && sim->tmr.counter != 0) {
@@ -23,10 +32,6 @@ static void tmrUpdate(VB *sim, uint16_t value) {
/* Process component */ /* Process component */
static void tmrEmulate(VB *sim, uint32_t clocks) { static void tmrEmulate(VB *sim, uint32_t clocks) {
/* Timer is disabled */
if (!sim->tmr.t_enb)
return;
/* Process all clocks */ /* Process all clocks */
for (;;) { for (;;) {
@@ -40,13 +45,20 @@ static void tmrEmulate(VB *sim, uint32_t clocks) {
/* Advance forward the component's number of clocks */ /* Advance forward the component's number of clocks */
clocks -= sim->tmr.clocks; clocks -= sim->tmr.clocks;
sim->tmr.until -= sim->tmr.clocks; sim->tmr.until -= sim->tmr.clocks;
sim->tmr.clocks = sim->tmr.t_clk_sel ? 400 : 2000; sim->tmr.clocks = 400;
sim->tmr.tick20 += sim->tmr.tick20 == 4 ? -4 : 1;
/* Do not decrement counter */
if (
!sim->tmr.t_enb ||
(!sim->tmr.t_clk_sel && sim->tmr.tick20 != 0)
) continue;
/* Advance to the next counter value */ /* Advance to the next counter value */
tmrUpdate(sim, sim->tmr.counter == 0 ? tmrUpdate(sim, sim->tmr.counter == 0 ?
sim->tmr.reload : sim->tmr.counter - 1); sim->tmr.reload : sim->tmr.counter - 1);
if (sim->tmr.counter == 0) if (sim->tmr.counter == 0)
sim->tmr.until = sim->tmr.clocks * ((uint32_t)sim->tmr.reload + 1); sim->tmr.until = tmrGetUntil(sim);
} }
} }
@@ -71,8 +83,10 @@ static void tmrReset(VB *sim) {
sim->tmr.z_stat = 0; sim->tmr.z_stat = 0;
/* Other */ /* Other */
sim->tmr.clocks = 400;
sim->tmr.counter = 0xFFFF; sim->tmr.counter = 0xFFFF;
sim->tmr.reload = 0x0000; sim->tmr.reload = 0x0000;
sim->tmr.tick20 = 0;
} }
/* Determine how many clocks are guaranteed to process */ /* Determine how many clocks are guaranteed to process */
@@ -88,14 +102,27 @@ static void tmrWriteControl(VB *sim, uint8_t value) {
if ( if (
(value & 0x04) && /* Z-Stat-Clr */ (value & 0x04) && /* Z-Stat-Clr */
( (
sim->tmr.counter != 0 || !sim->tmr.t_enb ||
!sim->tmr.t_enb (
sim->tmr.counter != 0 &&
!(value & 0x01) /* T-Enb */
)
) )
) { ) {
sim->tmr.z_stat = sim->tmr.counter != 0; sim->tmr.z_stat = sim->tmr.counter != 0;
sim->cpu.irq &= ~0x0002; sim->cpu.irq &= ~0x0002;
} }
/* Hardware bug: decrement on switch to 20us mode */
if (
!sim->tmr.t_clk_sel &&
(value & 0x10) && /* T-Clk-Sel */
sim->tmr.tick20 != 4
) {
tmrUpdate(sim, sim->tmr.counter == 0 ?
sim->tmr.reload : sim->tmr.counter - 1);
}
/* Parse fields */ /* Parse fields */
sim->tmr.t_clk_sel = value >> 4 & 1; sim->tmr.t_clk_sel = value >> 4 & 1;
sim->tmr.tim_z_int = value >> 3 & 1; sim->tmr.tim_z_int = value >> 3 & 1;
@@ -105,10 +132,8 @@ static void tmrWriteControl(VB *sim, uint8_t value) {
if (!sim->tmr.tim_z_int) if (!sim->tmr.tim_z_int)
sim->cpu.irq &= ~0x0002; sim->cpu.irq &= ~0x0002;
/* Configure countdowns */ /* Configure state */
sim->tmr.clocks = sim->tmr.t_clk_sel ? 400 : 2000; sim->tmr.until = tmrGetUntil(sim);
sim->tmr.until = sim->tmr.clocks * (sim->tmr.counter == 0 ?
(uint32_t) sim->tmr.reload + 1 : sim->tmr.counter);
/* TODO: Will Z-Stat raise an interrupt when Tim-Z-Int is set? */ /* TODO: Will Z-Stat raise an interrupt when Tim-Z-Int is set? */
} }
@@ -117,12 +142,14 @@ static void tmrWriteControl(VB *sim, uint8_t value) {
static void tmrWriteHigh(VB *sim, uint8_t value) { static void tmrWriteHigh(VB *sim, uint8_t value) {
sim->tmr.reload = (uint16_t) value << 8 | (sim->tmr.reload & 0x00FF); sim->tmr.reload = (uint16_t) value << 8 | (sim->tmr.reload & 0x00FF);
tmrUpdate(sim, sim->tmr.reload); tmrUpdate(sim, sim->tmr.reload);
sim->tmr.until = tmrGetUntil(sim);
} }
/* Write to the low data register */ /* Write to the low data register */
static void tmrWriteLow(VB *sim, uint8_t value) { static void tmrWriteLow(VB *sim, uint8_t value) {
sim->tmr.reload = (sim->tmr.reload & 0xFF00) | value; sim->tmr.reload = (sim->tmr.reload & 0xFF00) | value;
tmrUpdate(sim, sim->tmr.reload); tmrUpdate(sim, sim->tmr.reload);
sim->tmr.until = tmrGetUntil(sim);
} }
+1
View File
@@ -251,6 +251,7 @@ struct VB {
uint32_t clocks; /* Master clocks to wait */ uint32_t clocks; /* Master clocks to wait */
uint16_t counter; /* Current counter value */ uint16_t counter; /* Current counter value */
uint16_t reload; /* Reload counter value */ uint16_t reload; /* Reload counter value */
uint8_t tick20; /* Current 20-microsecond tick */
uint32_t until; /* Clocks until interrupt condition */ uint32_t until; /* Clocks until interrupt condition */
} tmr; } tmr;
+3 -3
View File
@@ -234,7 +234,7 @@ static void vipWriteCell(VB *sim, uint32_t offset, int type, int32_t value) {
case VB_S8: case VB_S8:
case VB_U8: case VB_U8:
value = offset & 1 ? value = offset & 1 ?
value << 8 | sim->vip.ram[0x20000 | offset] : value << 8 | sim->vip.ram[0x20001 ^ offset] :
value | (int32_t) sim->vip.ram[0x20001 | offset] << 8 value | (int32_t) sim->vip.ram[0x20001 | offset] << 8
; ;
break; break;
@@ -284,7 +284,7 @@ static void vipWriteObject(VB *sim, uint32_t offset, int type, int32_t value) {
case VB_S8: case VB_S8:
case VB_U8: case VB_U8:
value = offset & 1 ? value = offset & 1 ?
value << 8 | sim->vip.ram[0x3E000 | offset] : value << 8 | sim->vip.ram[0x3E001 ^ offset] :
value | (int32_t) sim->vip.ram[0x3E001 | offset] << 8 value | (int32_t) sim->vip.ram[0x3E001 | offset] << 8
; ;
break; break;
@@ -326,7 +326,7 @@ static void vipWriteWorld(VB *sim, uint32_t offset, int type, int32_t value) {
case VB_S8: case VB_S8:
case VB_U8: case VB_U8:
value = offset & 1 ? value = offset & 1 ?
value << 8 | sim->vip.ram[0x3D800 | offset] : value << 8 | sim->vip.ram[0x3D801 ^ offset] :
value | (int32_t) sim->vip.ram[0x3D801 | offset] << 8 value | (int32_t) sim->vip.ram[0x3D801 | offset] << 8
; ;
break; break;