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22 Commits
Author SHA1 Message Date
GuyPerfect 8598eab087 Fix double CPU clocks in reads/writes, assuage unused argument in vsuWrite() 2025-08-24 11:03:51 -05:00
GuyPerfect fe9c5c4781 Adjustment for VSU hardware behavior on erroneous address writes 2025-08-18 20:16:41 -05:00
GuyPerfect a9a02e2d15 Merging pull request 2025-08-17 13:32:01 -05:00
GuyPerfect ab29f47004 Merge pull request 'Fix issues with H-Bias rendering' (#1) from hbias-fix into main
Reviewed-on: #1
2025-08-17 18:22:53 +00:00
GuyPerfect 531e4a8c3e Fix handler address for FIV exception 2025-08-17 13:21:53 -05:00
GuyPerfect f295e02aaf Style adjustments for previous 2025-08-17 13:11:29 -05:00
GuyPerfect 67928da1e6 Merge pull request 'Add Floogle's latest audio fixes' (#3) from floogle-audio-fixes into main
Reviewed-on: #3
2025-08-17 18:02:04 +00:00
SonicSwordcane 4ebdad0c2d Add Floogle's latest audio fixes 2025-08-15 00:24:07 -04:00
SonicSwordcane 5d4a422e61 Fix handler address for FIV exception 2025-08-15 00:07:04 -04:00
SonicSwordcane 8b020ad808 Fix issues with HBias rendering 2025-08-14 23:46:39 -04:00
GuyPerfect 483714c0d6 Pushing current web edits 2025-03-23 07:26:43 -05:00
GuyPerfect ecbd103917 Manage IRQ on writes to INTENB 2025-03-04 10:19:12 -06:00
GuyPerfect b2412d9487 Fix shameful syntax error 2025-03-01 15:51:49 -06:00
GuyPerfect dd1045553b Even more VSU edge cases 2025-03-01 15:42:16 -06:00
GuyPerfect 459a16076a Expand BRTx to 0..132, fix affine parallax 2025-02-25 09:02:22 -06:00
GuyPerfect 185362e6cd Fix BKCOL debug writes, more VSU edge cases 2025-02-24 13:44:26 -06:00
GuyPerfect c62dd833a3 Include missing ISX decover 2025-02-18 15:13:18 -06:00
GuyPerfect 4f0b889b74 Adjustments for use in the web frontend 2025-02-18 15:10:46 -06:00
GuyPerfect 8ae8980fc8 Implement ISX decoding 2025-02-18 15:09:38 -06:00
GuyPerfect 10505e9e98 Supporting additional VSU edge cases 2025-02-18 15:09:15 -06:00
GuyPerfect 155a3aa678 Adjust GAMESTART logic, consolidate VIP sign-extensions 2025-01-17 09:43:58 -06:00
GuyPerfect 04e79c9151 Fix sign extensions from vipRead() and busReadMisc() 2025-01-15 19:47:44 -06:00
12 changed files with 586 additions and 110 deletions
+2
View File
@@ -159,6 +159,8 @@ static void busRead(VB *sim, uint32_t address, int type, int32_t *value) {
case 2: /* Misc. I/O */ case 2: /* Misc. I/O */
*value = busReadMisc(sim, address, type); *value = busReadMisc(sim, address, type);
if (type == VB_S8)
*value = (int8_t) *value;
break; break;
case 3: break; /* Unmapped */ case 3: break; /* Unmapped */
+3 -3
View File
@@ -234,7 +234,7 @@ static int cpuOnExecute(VB *sim) {
#define VB_ON_READ VB_DIRECT_READ #define VB_ON_READ VB_DIRECT_READ
#endif #endif
static int cpuRead(VB *sim, uint32_t address, int type, int32_t *value) { static int cpuRead(VB *sim, uint32_t address, int type, int32_t *value) {
uint32_t cycles = 4; /* TODO: Research this */ uint32_t cycles = 0; /* TODO: Research this */
/* Retrieve the value from the simulation state directly */ /* Retrieve the value from the simulation state directly */
busRead(sim, address, type, value); busRead(sim, address, type, value);
@@ -289,7 +289,7 @@ static int cpuReadFetch(VB *sim, int fetch, uint32_t address, int32_t *value) {
#endif #endif
static int cpuWrite(VB *sim, uint32_t address, int type, int32_t value) { static int cpuWrite(VB *sim, uint32_t address, int type, int32_t value) {
int cancel = 0; int cancel = 0;
uint32_t cycles = 3; /* TODO: Research this */ uint32_t cycles = 0; /* TODO: Research this */
/* Reset pseudo-halt */ /* Reset pseudo-halt */
if (sim->ph.enabled) if (sim->ph.enabled)
@@ -495,7 +495,7 @@ static int cpuException(VB *sim) {
sim->cpu.eipc = sim->cpu.pc; sim->cpu.eipc = sim->cpu.pc;
sim->cpu.psw.ep = 1; sim->cpu.psw.ep = 1;
sim->cpu.nextPC = 0xFFFF0000 | sim->cpu.nextPC = 0xFFFF0000 |
((cause & 0xFFF0) == 0xFF60 ? 0xFF60 : cause & 0xFFF0); ((cause & 0xFFF0) == 0xFF70 ? 0xFF60 : cause & 0xFFF0);
} }
/* All exceptions */ /* All exceptions */
+3
View File
@@ -29,6 +29,7 @@ typedef struct {
/* Other state */ /* Other state */
uint32_t clocks; /* Clocks until modification */ uint32_t clocks; /* Clocks until modification */
uint8_t modmask; /* Modifications masked */
uint8_t reload; /* Automatic reload value */ uint8_t reload; /* Automatic reload value */
} env; } env;
@@ -360,6 +361,8 @@ struct VB {
/* Other state */ /* Other state */
uint32_t clocks; /* Clocks until modification */ uint32_t clocks; /* Clocks until modification */
uint8_t freqmask; /* Frequency mask */
uint8_t modmask; /* Modifications masked */
uint16_t next; /* Next frequency value */ uint16_t next; /* Next frequency value */
int sample; /* Current sample index */ int sample; /* Current sample index */
} freqmod; } freqmod;
+37 -28
View File
@@ -42,14 +42,15 @@ static const uint8_t BG_TEMPLATES[][64] = {
/* 8-bit color magnitude by brightness level */ /* 8-bit color magnitude by brightness level */
static const uint8_t BRIGHT8[] = { static const uint8_t BRIGHT8[] = {
0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30, 0, 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 28,
32, 34, 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62, 30, 32, 34, 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 57, 59,
64, 66, 68, 70, 72, 74, 76, 78, 80, 82, 84, 86, 88, 90, 92, 94, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 86, 88, 90,
96, 98,100,102,104,106,108,110,112,114,116,118,120,122,124,126, 92, 94, 96, 98,100,102,104,106,108,110,112,113,115,117,119,121,
129,131,133,135,137,139,141,143,145,147,149,151,153,155,157,159, 123,125,127,129,131,133,135,137,139,141,142,144,146,148,150,152,
161,163,165,167,169,171,173,175,177,179,181,183,185,187,189,191, 154,156,158,160,162,164,166,168,170,171,173,175,177,179,181,183,
193,195,197,199,201,203,205,207,209,211,213,215,217,219,221,223, 185,187,189,191,193,195,197,198,200,202,204,206,208,210,212,214,
225,227,229,231,233,235,237,239,241,243,245,247,249,251,253,255 216,218,220,222,224,226,227,229,231,233,235,237,239,241,243,245,
247,249,251,253,255
}; };
@@ -435,6 +436,9 @@ static void vipWriteIO(
case 0x5F802>>1: /* INTENB */ case 0x5F802>>1: /* INTENB */
sim->vip.intenb = (sim->vip.intenb & mask) | (value & 0xE01F); sim->vip.intenb = (sim->vip.intenb & mask) | (value & 0xE01F);
if (sim->vip.intenb & sim->vip.intpnd)
sim->cpu.irq |= 0x0010;
else sim->cpu.irq &= ~0x0010;
break; break;
case 0x5F804>>1: /* INTCLR */ case 0x5F804>>1: /* INTCLR */
sim->vip.intpnd &= ~value; sim->vip.intpnd &= ~value;
@@ -546,7 +550,7 @@ static void vipWriteIO(
break; break;
case 0x5F870>>1: /* BKCOL */ case 0x5F870>>1: /* BKCOL */
sim->vip.bkcol = (sim->vip.bkcol & mask) | (value & 3 * ~mask); sim->vip.bkcol = (sim->vip.bkcol & mask) | (value & 3 & ~mask);
break; break;
} }
@@ -586,7 +590,7 @@ static void vipComputeBrightness(VB *sim) {
/* Transform brightness values to 0..255 */ /* Transform brightness values to 0..255 */
for (x = 1; x < 4; x++) for (x = 1; x < 4; x++)
sim->vip.dp.brt[x] = brt[x] > 127 ? 255 : BRIGHT8[brt[x]]; sim->vip.dp.brt[x] = brt[x] > 132 ? 255 : BRIGHT8[brt[x]];
} }
/* Transfer one column of frame buffer pixels to output */ /* Transfer one column of frame buffer pixels to output */
@@ -654,29 +658,29 @@ static int vipEmulateDisplay(VB *sim, uint32_t clocks) {
vipThrow(sim, 0x0010); /* FRAMESTART */ vipThrow(sim, 0x0010); /* FRAMESTART */
/* Game frame */ /* Game frame */
if (sim->vip.xp.xpen) {
if (sim->vip.xp.frame >= sim->vip.frmcyc) { if (sim->vip.xp.frame >= sim->vip.frmcyc) {
sim->vip.dp.buffer ^= sim->vip.xp.toggle;
sim->vip.xp.frame = 0; sim->vip.xp.frame = 0;
sim->vip.xp.toggle = 0;
/* Initiate drawing procedure */
if (sim->vip.xp.step == 0) {
sim->vip.xp.enabled = 1;
sim->vip.xp.overtime = 0;
sim->vip.xp.step = 1;
vipThrow(sim, 0x0008); /* GAMESTART */ vipThrow(sim, 0x0008); /* GAMESTART */
} if (sim->vip.xp.step != 0) {
/* Drawing procedure has run into overtime */
else {
sim->vip.xp.overtime = 1; sim->vip.xp.overtime = 1;
vipThrow(sim, 0x8000); /* TIMEERR */ vipThrow(sim, 0x8000); /* TIMEERR */
} }
} else sim->vip.xp.frame++; /* Initiate drawing procedure */
else if (sim->vip.xp.xpen) {
sim->vip.dp.buffer ^= sim->vip.xp.toggle;
sim->vip.xp.enabled = 1;
sim->vip.xp.overtime = 0;
sim->vip.xp.step = 1;
sim->vip.xp.toggle = 0;
} }
}
/* Not a game frame */
else sim->vip.xp.frame++;
break; break;
/* 0ms-3ms - Idle */ /* 0ms-3ms - Idle */
@@ -980,7 +984,7 @@ static void vipDrawHBias(VB *sim, World *world) {
/* Process all visible lines */ /* Process all visible lines */
param = &sim->vip.ram[world->paramBase + param = &sim->vip.ram[world->paramBase +
((y1 - world->gy) << 2) + (i << 1)]; ((y1 - world->gy) << 2) + (i << 1)];
for (y = y1; y < y2; y++, param += 2) { for (y = y1; y < y2; y++, param += 4) {
/* Configure window bounds */ /* Configure window bounds */
wnd.y1 = y; wnd.y1 = y;
@@ -988,7 +992,7 @@ static void vipDrawHBias(VB *sim, World *world) {
/* Draw the background into the window */ /* Draw the background into the window */
vipDrawBackground(sim->vip.shadow[i], &wnd, world, vipDrawBackground(sim->vip.shadow[i], &wnd, world,
mx + busReadBuffer(param, VB_S16), my); mx - busReadBuffer(param, VB_S16), my);
} }
} }
@@ -1060,8 +1064,8 @@ static void vipDrawAffine(VB *sim, World *world) {
/* Adjust left-edge parameters */ /* Adjust left-edge parameters */
if ((mp < 0) ^ i) { if ((mp < 0) ^ i) {
mx += dx * (wx - mp); mx += dx * (wx + mp);
my += dy * (wx - mp); my += dy * (wx + mp);
} else { } else {
mx += dx * wx; mx += dx * wx;
my += dy * wx; my += dy * wx;
@@ -1316,8 +1320,13 @@ static void vipRead(VB *sim, uint32_t address, int type, int32_t *value) {
*value = 0; *value = 0;
/* I/O register */ /* I/O register */
else if (address < 0x60000) else if (address < 0x60000) {
*value = vipReadIO(sim, address, type); *value = vipReadIO(sim, address, type);
switch (type) {
case VB_S8 : *value = (int8_t ) *value; break;
case VB_S16: *value = (int16_t) *value; break;
}
}
/* Unmapped */ /* Unmapped */
else if (address < 0x78000) else if (address < 0x78000)
+120 -41
View File
@@ -45,9 +45,28 @@ static void vsuOnSamples(VB *sim) {
/***************************** Module Functions ******************************/ /***************************** Module Functions ******************************/
/* Determine while frequency modifications should be processed */
static uint8_t vsuCheckFreqMod(VB *sim) {
return
sim->vsu.freqmod.enb &&
sim->vsu.freqmod.interval != 0 && (
sim->vsu.freqmod.modmask != 2 || (
sim->vsu.freqmod.func == 1 &&
sim->vsu.freqmod.rep
)
)
;
}
/* Stage the next frequency modification value */ /* Stage the next frequency modification value */
static void vsuNextFreqMod(VB *sim, Channel *chan) { static void vsuNextFreqMod(VB *sim, Channel *chan) {
uint16_t next; int32_t next;
/* Modulation mask control */
if (sim->vsu.freqmod.modmask == 1 && sim->vsu.freqmod.func == 1) {
sim->vsu.freqmod.modmask = 2;
chan->freqmod = vsuCheckFreqMod(sim);
}
/* Sweep */ /* Sweep */
if (sim->vsu.freqmod.func == 0) { if (sim->vsu.freqmod.func == 0) {
@@ -57,25 +76,37 @@ static void vsuNextFreqMod(VB *sim, Channel *chan) {
else next = chan->freq.current + next; else next = chan->freq.current + next;
if (next > 2047) if (next > 2047)
chan->int_.enb = 0; chan->int_.enb = 0;
if (next < 0)
next = 0;
} }
/* Modulation */ /* Modulation */
else { else {
next = (chan->freq.written + next = ((int32_t) chan->freq.written +
sim->vsu.modulation[sim->vsu.freqmod.sample]) & 2047; sim->vsu.modulation[sim->vsu.freqmod.sample]) & 0x7FF;
if (sim->vsu.freqmod.sample != 31) if (sim->vsu.freqmod.freqmask == 1)
sim->vsu.freqmod.sample++; next = (next & 0x700) | (chan->freq.written & 0x0FF);
else if (sim->vsu.freqmod.rep) else if (sim->vsu.freqmod.freqmask == 2)
sim->vsu.freqmod.sample = 0; next = (next & 0x0FF) | (chan->freq.written & 0x700);
} }
/* Configure state */ /* Configure state */
if (chan->freqmod)
sim->vsu.freqmod.next = next; sim->vsu.freqmod.next = next;
} }
/* Advance the noise channel's shift register */
static void vsuNextNoise(VB *sim) {
uint32_t bit = ((
sim->vsu.noise.register_ >> NOISE_TAPS[sim->vsu.noise.tap] ^
sim->vsu.noise.register_ >> 7
) & 1) ^ 1;
sim->vsu.noise.register_ = bit |
(sim->vsu.noise.register_ << 1 & 0x7FFE);
}
/* Process one channel */ /* Process one channel */
static void vsuEmulateChannel(VB *sim, Channel *chan) { static void vsuEmulateChannel(VB *sim, Channel *chan) {
uint32_t bit; /* Pseudorandom bit */
/* Automatic shutoff */ /* Automatic shutoff */
if (chan->int_.auto_ && chan->int_.clocks == 0) { if (chan->int_.auto_ && chan->int_.clocks == 0) {
@@ -95,37 +126,62 @@ static void vsuEmulateChannel(VB *sim, Channel *chan) {
/* Noise */ /* Noise */
else { else {
chan->clocks = 40 * (2048 - (uint32_t) chan->freq.current); chan->clocks = 40 * (2048 - (uint32_t) chan->freq.current);
bit = (( vsuNextNoise(sim);
sim->vsu.noise.register_ >> NOISE_TAPS[sim->vsu.noise.tap]^
sim->vsu.noise.register_ >> 7
) & 1) ^ 1;
sim->vsu.noise.register_ = bit |
(sim->vsu.noise.register_ << 1 & 0x7FFE);
} }
} }
/* Envelope modification */ /* Envelope modification */
if (chan->env.enb && chan->env.clocks == 0) { if (chan->env.clocks == 0) {
uint8_t new_envelope = chan->env.value;
if (chan->env.dir == 0 && chan->env.value != 0) if (chan->env.dir == 0 && chan->env.value != 0)
chan->env.value--; new_envelope--;
else if (chan->env.dir == 1 && chan->env.value != 15) else if (chan->env.dir == 1 && chan->env.value != 15)
chan->env.value++; new_envelope++;
else if (chan->env.rep) else if (chan->env.rep && chan->env.modmask != 2) {
chan->env.value = chan->env.reload; new_envelope = chan->env.reload;
chan->env.modmask = 0;
} else if (!chan->env.modmask)
chan->env.modmask = 1;
if (chan->env.enb && !chan->env.modmask)
chan->env.value = new_envelope;
chan->env.clocks = ((uint32_t) chan->env.interval + 1) * 307220; chan->env.clocks = ((uint32_t) chan->env.interval + 1) * 307220;
} }
/* Frequency modification */ /* Frequency modification */
if (chan->freqmod && sim->vsu.freqmod.clocks == 0) { if (chan == &sim->vsu.channels[4] && sim->vsu.freqmod.clocks == 0) {
/* Apply previously computed frequency modification */
if (chan->freqmod)
chan->freq.current = sim->vsu.freqmod.next; chan->freq.current = sim->vsu.freqmod.next;
vsuNextFreqMod(sim, chan);
/* Channel itself is disabled */
if (!chan->int_.enb) if (!chan->int_.enb)
return; return;
/* Frequency modifications are enabled */
if (chan->freqmod) {
/* Not the final modulation sample */
if (sim->vsu.freqmod.sample != 31)
sim->vsu.freqmod.sample++;
/* Last modulation sample processed */
else {
sim->vsu.freqmod.modmask = 1;
if (sim->vsu.freqmod.rep)
sim->vsu.freqmod.sample = 0;
}
/* Schedule next modification */
sim->vsu.freqmod.clocks = (uint32_t) sim->vsu.freqmod.interval * sim->vsu.freqmod.clocks = (uint32_t) sim->vsu.freqmod.interval *
(sim->vsu.freqmod.clk == 0 ? 19200 : 153600); (sim->vsu.freqmod.clk == 0 ? 19200 : 153600);
} }
/* Always process and validate next frequency value */
vsuNextFreqMod(sim, chan);
}
} }
/* Produce output for a channel */ /* Produce output for a channel */
@@ -164,8 +220,11 @@ static void vsuWriteEV0(VB *sim, int index, uint8_t value) {
chan->env.interval = value & 7; chan->env.interval = value & 7;
chan->env.value = value >> 4 & 15; chan->env.value = value >> 4 & 15;
chan->env.reload = chan->env.value; chan->env.reload = chan->env.value;
if (index == 4) if (chan->env.modmask == 1) chan->env.modmask = 2;
if (index == 4) {
chan->freqmod = vsuCheckFreqMod(sim);
vsuNextFreqMod(sim, chan); vsuNextFreqMod(sim, chan);
}
/* Configure state */ /* Configure state */
chan->env.clocks = 307220 * ((uint32_t) chan->env.interval + 1); chan->env.clocks = 307220 * ((uint32_t) chan->env.interval + 1);
@@ -178,6 +237,12 @@ static void vsuWriteEV1(VB *sim, int index, uint8_t value) {
/* Parse fields */ /* Parse fields */
chan->env.enb = value & 1; chan->env.enb = value & 1;
chan->env.rep = value >> 1 & 1; chan->env.rep = value >> 1 & 1;
if (
!chan->env.rep && (
(chan->env.reload == 0 && chan->env.dir == 0) ||
(chan->env.reload == 15 && chan->env.dir == 1)
)
) chan->env.modmask = 1;
/* Processing by channel */ /* Processing by channel */
switch (index) { switch (index) {
@@ -186,14 +251,14 @@ static void vsuWriteEV1(VB *sim, int index, uint8_t value) {
sim->vsu.freqmod.enb = value >> 6 & 1; sim->vsu.freqmod.enb = value >> 6 & 1;
sim->vsu.freqmod.func = value >> 4 & 1; sim->vsu.freqmod.func = value >> 4 & 1;
sim->vsu.freqmod.rep = value >> 5 & 1; sim->vsu.freqmod.rep = value >> 5 & 1;
chan->freqmod = vsuCheckFreqMod(sim);
vsuNextFreqMod(sim, chan); vsuNextFreqMod(sim, chan);
chan->freqmod =
sim->vsu.freqmod.enb && sim->vsu.freqmod.interval != 0;
break; break;
case 5: /* Channel 6 */ case 5: /* Channel 6 */
sim->vsu.noise.tap = value >> 4 & 7; sim->vsu.noise.tap = value >> 4 & 7;
sim->vsu.noise.register_ = 0x0000; sim->vsu.noise.register_ = 0x0000;
vsuNextNoise(sim);
} }
} }
@@ -204,7 +269,9 @@ static void vsuWriteFQH(VB *sim, int index, uint16_t value) {
value = value << 8 & 0x0700; value = value << 8 & 0x0700;
chan->freq.current = (chan->freq.current & 0x00FF) | value; chan->freq.current = (chan->freq.current & 0x00FF) | value;
chan->freq.written = (chan->freq.written & 0x00FF) | value; chan->freq.written = (chan->freq.written & 0x00FF) | value;
if (index == 4) if (index != 4)
return;
sim->vsu.freqmod.freqmask = 2;
vsuNextFreqMod(sim, chan); vsuNextFreqMod(sim, chan);
} }
@@ -213,7 +280,9 @@ static void vsuWriteFQL(VB *sim, int index, uint8_t value) {
Channel *chan = &sim->vsu.channels[index]; Channel *chan = &sim->vsu.channels[index];
chan->freq.current = (chan->freq.current & 0x0700) | value; chan->freq.current = (chan->freq.current & 0x0700) | value;
chan->freq.written = (chan->freq.written & 0x0700) | value; chan->freq.written = (chan->freq.written & 0x0700) | value;
if (index == 4) if (index != 4)
return;
sim->vsu.freqmod.freqmask = 1;
vsuNextFreqMod(sim, chan); vsuNextFreqMod(sim, chan);
} }
@@ -228,19 +297,29 @@ static void vsuWriteINT(VB *sim, int index, uint8_t value) {
/* Update state */ /* Update state */
chan->int_.clocks = 76805 * ((uint32_t) chan->int_.interval + 1); chan->int_.clocks = 76805 * ((uint32_t) chan->int_.interval + 1);
if (chan->env.enb) chan->env.modmask = 0;
if (
!chan->env.rep && (
(chan->env.reload == 0 && chan->env.dir == 0) ||
(chan->env.reload == 15 && chan->env.dir == 1)
)
) chan->env.modmask = 1;
chan->env.clocks = 307220 * ((uint32_t) chan->env.interval + 1); chan->env.clocks = 307220 * ((uint32_t) chan->env.interval + 1);
if (index != 5) { if (index != 5) {
chan->wave.sample = 0; chan->wave.sample = 0;
chan->clocks = 4 * (2048 - (uint32_t) chan->freq.current); chan->clocks = 4 * (2048 - (uint32_t) chan->freq.current);
} else { } else {
sim->vsu.noise.register_ = 0x0000; sim->vsu.noise.register_ = 0x0000;
vsuNextNoise(sim);
chan->clocks = 40 * (2048 - (uint32_t) chan->freq.current); chan->clocks = 40 * (2048 - (uint32_t) chan->freq.current);
} }
if (index == 4) { if (index == 4) {
sim->vsu.freqmod.clocks = (uint32_t) sim->vsu.freqmod.interval * sim->vsu.freqmod.clocks = (uint32_t) sim->vsu.freqmod.interval *
(sim->vsu.freqmod.clk == 0 ? 19200 : 153600); (sim->vsu.freqmod.clk == 0 ? 19200 : 153600);
sim->vsu.freqmod.modmask = 0;
sim->vsu.freqmod.sample = 0; sim->vsu.freqmod.sample = 0;
chan->freqmod = vsuCheckFreqMod(sim);
vsuNextFreqMod(sim, chan);
} }
} }
@@ -272,8 +351,8 @@ static void vsuWriteSWP(VB *sim, uint8_t value) {
(sim->vsu.freqmod.clk == 0 ? 19200 : 153600); (sim->vsu.freqmod.clk == 0 ? 19200 : 153600);
if (clocks < sim->vsu.freqmod.clocks) if (clocks < sim->vsu.freqmod.clocks)
sim->vsu.freqmod.clocks = clocks; sim->vsu.freqmod.clocks = clocks;
sim->vsu.channels[4].freqmod = sim->vsu.channels[4].freqmod = vsuCheckFreqMod(sim);
sim->vsu.freqmod.enb && sim->vsu.freqmod.interval != 0; vsuNextFreqMod(sim, &sim->vsu.channels[4]);
} }
@@ -315,7 +394,8 @@ static void vsuEmulate(VB *sim, uint32_t clocks) {
/* Clocks until next state change */ /* Clocks until next state change */
chan->until = chan->clocks; chan->until = chan->clocks;
if (chan->env.enb && chan->env.clocks < chan->until) if (chan->env.enb && chan->env.modmask != 2 &&
chan->env.clocks < chan->until)
chan->until = chan->env.clocks; chan->until = chan->env.clocks;
if (chan->int_.auto_ && chan->int_.clocks < chan->until) if (chan->int_.auto_ && chan->int_.clocks < chan->until)
chan->until = chan->int_.clocks; chan->until = chan->int_.clocks;
@@ -324,7 +404,7 @@ static void vsuEmulate(VB *sim, uint32_t clocks) {
/* Manage clocks */ /* Manage clocks */
chan->clocks -= chan->until; chan->clocks -= chan->until;
if (chan->env.enb) if (chan->env.enb && chan->env.modmask != 2)
chan->env.clocks -= chan->until; chan->env.clocks -= chan->until;
if (chan->int_.auto_) if (chan->int_.auto_)
chan->int_.clocks -= chan->until; chan->int_.clocks -= chan->until;
@@ -427,6 +507,7 @@ static void vsuReset(VB *sim) {
chan->env.enb = 0; chan->env.enb = 0;
chan->env.dir = 0; chan->env.dir = 0;
chan->env.interval = 0; chan->env.interval = 0;
chan->env.modmask = 0;
chan->env.reload = 0; chan->env.reload = 0;
chan->env.rep = 0; chan->env.rep = 0;
chan->env.value = 0; chan->env.value = 0;
@@ -447,8 +528,10 @@ static void vsuReset(VB *sim) {
sim->vsu.freqmod.clocks = 0; sim->vsu.freqmod.clocks = 0;
sim->vsu.freqmod.dir = 0; sim->vsu.freqmod.dir = 0;
sim->vsu.freqmod.enb = 0; sim->vsu.freqmod.enb = 0;
sim->vsu.freqmod.freqmask = 0;
sim->vsu.freqmod.func = 0; sim->vsu.freqmod.func = 0;
sim->vsu.freqmod.interval = 0; sim->vsu.freqmod.interval = 0;
sim->vsu.freqmod.modmask = 0;
sim->vsu.freqmod.next = 0; sim->vsu.freqmod.next = 0;
sim->vsu.freqmod.rep = 0; sim->vsu.freqmod.rep = 0;
sim->vsu.freqmod.sample = 0; sim->vsu.freqmod.sample = 0;
@@ -465,21 +548,17 @@ static void vsuReset(VB *sim) {
/* Write a typed value to the VSU bus */ /* Write a typed value to the VSU bus */
static void vsuWrite(VB*sim,uint32_t address,int type,int32_t value,int debug){ static void vsuWrite(VB*sim,uint32_t address,int type,int32_t value,int debug){
(void) type;
/* Only byte writes are allowed */
switch (type) {
case VB_S16:
case VB_U16:
case VB_S32:
return;
}
/* Unmapped */ /* Unmapped */
if (address & 3) if (address & 1)
return; return;
/* Working variables */ /* Working variables */
address &= 0x7FF; address &= 0x7FC;
/* Clear frequency mask */
sim->vsu.freqmod.freqmask = 0;
/* Wave memory */ /* Wave memory */
if (address < 0x280) { if (address < 0x280) {
+297
View File
@@ -0,0 +1,297 @@
/* This file is included into vbu.c and cannot be compiled on its own. */
#ifdef VBUAPI
/********************************* Constants *********************************/
/* Range types */
/*
0x41 ('A') 8-bit integer (.db), string
0x42 ('B') 8-bit integer (.db), numeric
0x43 ('C') Compiled C code
0x44 ('D') 16-bit integer (.dd, high byte first)
0x45 ('E') 65C816 code (8-bit accumulator, 8-bit index)
0x46 ('F') 65C816 code (8-bit accumulator, 16-bit index)
0x47 ('G') 65C816 code (16-bit accumulator, 8-bit index)
0x48 ('H') 65C816 code (16-bit accumulator, 16-bit index)
0x4C ('L') 32-bit integer (.dl SNES, .dw Virtual Boy, low byte first)
0x53 ('S') Size reservation, as in .bss allocation (.ds)
0x57 ('W') 16-bit integer (.dw SNES, .dh Virtual Boy, low byte first)
*/
/***************************** Module Functions ******************************/
/* Skip ISX record type 0x01 */
static size_t isx01(uint8_t *bytes, size_t length, size_t src) {
/*
u8 Type =0x01
u8 Bank Cartridge bank number
u8 BankHigh Only if Bank >= 0x80
u16 Address CPU bus address
u16 DataLength Number of bytes in Data
u8[] Data Code bytes
*/
/* Bank field is not present */
if (src + 2 > length)
return (size_t) -1;
/* Advance to DataLength field */
src += bytes[src + 1] >= 0x80 ? 5 : 4;
/* DataLength field is not present */
if (src + 2 > length)
return (size_t) -1;
/* Advance past Data field */
return src + 2 + ((uint16_t) bytes[src + 1] << 8 | bytes[src]);
}
/* Decode ISX record type 0x11 */
static size_t isx11(uint8_t *bytes, size_t length, size_t src,
uint32_t *address, uint32_t *size) {
/*
u8 Type =0x11
u32 Address CPU bus address
u32 DataLength Number of bytes in Data
u8[] Data Code bytes
*/
/* DataLength field is not present */
if (src + 9 > length)
return (size_t) -1;
/* Parse Address and DataLength fields */
*address = (uint32_t) bytes[src+4] << 24 | (uint32_t) bytes[src+3] << 16 |
(uint32_t) bytes[src+2] << 8 | bytes[src+1];
*size = (uint32_t) bytes[src+8] << 24 | (uint32_t) bytes[src+7] << 16 |
(uint32_t) bytes[src+6] << 8 | bytes[src+5];
/* Advance past Data field */
return src + 9 + *size;
}
/* Skip ISX range records */
static size_t isxRange(uint8_t *bytes,size_t length,size_t src,size_t size) {
/*
u8 Type =0x03 (SNES) or 0x13 (Virtual Boy)
u16 Count Number of ranges
Range[] Ranges
=== SNES fields ===
u8 Bank Cartridge bank number
u16 StartAddress Lowest CPU bus address
u16 EndAddress Highest CPU bus address
u8 RangeType See range types
=== Virtual Boy fields ===
u32 StartAddress Lowest CPU bus address
u32 EndAddress Highest CPU bus address
u8 RangeType See range types
*/
/* Count field is not present */
if (src + 3 > length)
return (size_t) -1;
/* Advance past Ranges field */
return src + 3 + size * ((uint16_t) bytes[src + 2] << 8 | bytes[src + 1]);
}
/* Skip ISX symbol record */
static size_t isxSymbol(uint8_t *bytes,size_t length,size_t src,size_t size) {
size_t count; /* Number of symbols */
size_t x; /* Iterator */
/*
u8 Type =0x04 (SNES) or 0x14 (Virtual Boy)
u16 Count Number of symbols
Symbol[] Symbols
u8 NameLength Number of bytes in Name
u8[] Name Symbol name
=== SNES fields ===
u8 Flags Undocumented
u8 Bank Cartridge bank number
u16 Address CPU bus address
=== Virtual Boy fields ===
u16 Flags Undocumented
u32 Address CPU bus address
*/
/* Count field is not present */
if (src + 3 > length)
return (size_t) -1;
/* Working variables */
count = (uint16_t) bytes[src + 2] << 8 | bytes[src + 1];
src += 3;
/* Process all symbols */
for (x = 0; x < count; x++) {
/* NameLength field is not present */
if (src > length)
return (size_t) -1;
/* Advance past remainder of symbol */
src += size + bytes[src];
/* Remainder of symbol is not present */
if (src > length)
return (size_t) -1;
}
return src;
}
/* Skip ISX system record */
static size_t isxSystem(uint8_t *bytes, size_t length, size_t src) {
/*
u8 Type =0x20, 0x21 or 0x22
u32 DataLength Number of bytes in Data
u8[] Data Record data
*/
/* DataLength field is not present */
if (src + 5 > length)
return (size_t) -1;
/* Advance past Data field */
return src + 5 + (
(uint32_t) bytes[src + 4] << 24 | (uint32_t) bytes[src + 3] << 16 |
(uint32_t) bytes[src + 2] << 8 | bytes[src + 1]
);
}
/***************************** Library Functions *****************************/
/* Decode an ISX debugger file to a Virtual Boy ROM */
static void* isxFrom(uint8_t *bytes, size_t length, size_t *romLength) {
uint32_t addr; /* Code record base address */
uint32_t highMin; /* Lowest address in upper half of ROM */
uint32_t lowMax; /* Highest address in lower half of ROM */
uint8_t *rom; /* Output ROM */
uint32_t size; /* Code record size in bytes */
size_t src; /* Input position */
size_t start; /* Offset of first record */
/* Error checking */
if (length < 3)
return NULL;
/* Working variables */
highMin = 0xFFFFFF;
lowMax = 0x000000;
size = 0;
start = strncmp((char *) bytes, "ISX", 3) ? 0 : 32;
/* First pass: determine the size of the ROM */
for (src = start; src < length;) {
switch (bytes[src]) {
case 0x11: /* Code (Virtual Boy) */
/* Decode record fields */
src = isx11(bytes, length, src, &addr, &size);
if (src > length)
return NULL;
/* Validate address and data size */
addr &= 0x07FFFFFF;
if (
addr < 0x07000000 ||
0x08000000 - addr < size
) return NULL;
addr &= 0x00FFFFFF;
/* Requires 16 MiB */
if (addr < 0x800000 && addr + size > 0x800000) {
highMin = 0x800000;
lowMax = 0x7FFFFF;
}
/* Map from top of ROM space */
else if (addr & 0x800000) {
if (addr < highMin)
highMin = addr;
}
/* Map from bottom of ROM space */
else {
addr += size - 1;
if (addr > lowMax)
lowMax = addr;
}
break;
case 0x01: /* Code (SNES) */
src = isx01 (bytes, length, src ); break;
case 0x03: /* Range (SNES) */
src = isxRange (bytes, length, src, 6); break;
case 0x04: /* Symbol (SNES) */
src = isxSymbol(bytes, length, src, 5); break;
case 0x13: /* Range (Virtual Boy) */
src = isxRange (bytes, length, src, 9); break;
case 0x14: /* Symbol (Virtual Boy) */
src = isxSymbol(bytes, length, src, 7); break;
case 0x20: /* System (undocumented) */
case 0x21: /* System (undocumented) */
case 0x22: /* System (undocumented) */
src = isxSystem(bytes, length, src ); break;
default: /* Invalid record type */
return NULL;
}
/* Record contains invalid data */
if (src > length)
return NULL;
}
/* Produce a ROM buffer of minimal size to fit all the code records */
for (
src = 1;
src < lowMax + 0x1000001 - highMin;
src <<= 1
);
rom = VBU_REALLOC(NULL, src);
if (rom == NULL)
return NULL;
*romLength = src;
memset(rom, 0x00, src);
/* Second pass: fill the ROM buffer with the code records */
for (src = start; src < length;) {
switch (bytes[src]) {
case 0x11: /* Code (Virtual Boy) */
src = isx11(bytes, length, src, &addr, &size);
memcpy(&rom[addr & (*romLength-1)], &bytes[src - size], size);
break;
case 0x01: /* Code (SNES) */
src = isx01 (bytes, length, src ); break;
case 0x03: /* Range (SNES) */
src = isxRange (bytes, length, src, 9); break;
case 0x04: /* Symbol (SNES) */
src = isxSymbol(bytes, length, src, 5); break;
case 0x13: /* Range (Virtual Boy) */
src = isxRange (bytes, length, src, 12); break;
case 0x14: /* Symbol (Virtual Boy) */
src = isxSymbol(bytes, length, src, 7); break;
case 0x20: /* System (undocumented) */
case 0x21: /* System (undocumented) */
case 0x22: /* System (undocumented) */
src = isxSystem(bytes, length, src ); break;
}
}
return rom;
}
#endif /* VBUAPI */
+6
View File
@@ -33,6 +33,7 @@ static int32_t SignExtend(int32_t value, int32_t bits) {
/******************************** Sub-Modules ********************************/ /******************************** Sub-Modules ********************************/
#include "disassembler.c" #include "disassembler.c"
#include "isx.c"
@@ -70,3 +71,8 @@ VBUAPI VBU_DasmLine* vbuDisassemble(VB *sim, uint32_t address,
VBU_DasmConfig *config, unsigned length, int line) { VBU_DasmConfig *config, unsigned length, int line) {
return dasmDisassemble(sim, address, config, length, line); return dasmDisassemble(sim, address, config, length, line);
} }
/* Decode an ISX debugger file to a Virtual Boy ROM */
VBUAPI void* vbuFromISX(void *bytes, size_t length, size_t *romLength) {
return isxFrom(bytes, length, romLength);
}
+1
View File
@@ -88,6 +88,7 @@ typedef struct {
VBUAPI int vbuCodeSize (VB *sim, uint32_t address); VBUAPI int vbuCodeSize (VB *sim, uint32_t address);
VBUAPI VBU_DasmConfig* vbuDasmInit (VBU_DasmConfig *config); VBUAPI VBU_DasmConfig* vbuDasmInit (VBU_DasmConfig *config);
VBUAPI VBU_DasmLine* vbuDisassemble(VB *sim, uint32_t address, VBU_DasmConfig *config, unsigned length, int line); VBUAPI VBU_DasmLine* vbuDisassemble(VB *sim, uint32_t address, VBU_DasmConfig *config, unsigned length, int line);
VBUAPI void* vbuFromISX (void *bytes, size_t length, size_t *romLength);
-2
View File
@@ -1,7 +1,5 @@
"use strict"; "use strict";
//////////////////////////////////// Audio ////////////////////////////////////
// Dedicated audio output processor // Dedicated audio output processor
class Audio extends AudioWorkletProcessor { class Audio extends AudioWorkletProcessor {
+2 -3
View File
@@ -1,4 +1,5 @@
let Constants = { "use strict";
export default {
// Core // Core
VB: { VB: {
@@ -85,5 +86,3 @@ let Constants = {
} }
}; };
export { Constants };
+42 -1
View File
@@ -1,5 +1,5 @@
"use strict"; "use strict";
import { Constants } from "./Constants.js"; import Constants from /***/"./Constants.js";
@@ -258,6 +258,47 @@ new class Core {
}); });
} }
// Attempt to produce a ROM from an ISX debugger file
fromISX(message) {
// Transfer the input data into WebAssembly memory
let input = new Uint8Array(message.data);
let inPtr = this.Realloc(0, input.length);
let inMem = new Uint8Array(this.memory.buffer, inPtr, input.length);
for (let x = 0; x < input.length; x++)
inMem[x] = input[x];
// Attempt to decode the ISX file as a ROM
let outPtr = this.FromISX(inPtr, input.length);
this.Realloc(inPtr, 0);
// The data is not an ISX file
if (outPtr == 0) {
this.dom.postMessage({ promised: true, data: null });
return;
}
// Transfer the decoded ROM from WebAssembly memory
let output = new Uint8Array(this.GetISXLength(outPtr));
let outMem = new Uint8Array(this.memory.buffer,
this.GetISXROM(outPtr), output.length);
for (let x = 0; x < output.length; x++)
output[x] = outMem[x];
this.Realloc(outPtr, 0);
// Notify DOM thread
this.dom.postMessage({
promised: true,
data : output.buffer
}, [ output.buffer ]);
}
// Reset simulation state
reset(message) {
this.vbReset(message.sim);
this.dom.postMessage({ promised: true });
}
// Specify anaglyph colors // Specify anaglyph colors
setAnaglyph(message) { setAnaglyph(message) {
this.SetAnaglyph(message.sim, message.left, message.right); this.SetAnaglyph(message.sim, message.left, message.right);
+55 -14
View File
@@ -1,5 +1,5 @@
"use strict"; "use strict";
import { Constants } from "./Constants.js"; import Constants from /**/"./Constants.js";
// Instantiation guard // Instantiation guard
const GUARD = Symbol(); const GUARD = Symbol();
@@ -436,8 +436,17 @@ class Sim extends HTMLElement {
response.lines.map(l=>new DasmLine(GUARD, l)); response.lines.map(l=>new DasmLine(GUARD, l));
} }
// Reset simulation state
reset() {
return this.#core.toCore({
command : "reset",
promised: true,
sim : this.#pointer
});
}
// Specify anaglyph colors // Specify anaglyph colors
async setAnaglyph(left, right) { setAnaglyph(left, right) {
// Error checking // Error checking
if (!Number.isSafeInteger(left ) || left < 0 || left > 0xFFFFFF) if (!Number.isSafeInteger(left ) || left < 0 || left > 0xFFFFFF)
@@ -455,7 +464,7 @@ class Sim extends HTMLElement {
this.#anaglyph[1] = right; this.#anaglyph[1] = right;
// Send the colors to the core // Send the colors to the core
await this.#core.toCore({ return this.#core.toCore({
command : "setAnaglyph", command : "setAnaglyph",
promised: true, promised: true,
sim : this.#pointer, sim : this.#pointer,
@@ -475,7 +484,7 @@ class Sim extends HTMLElement {
} }
// Specify new game pad keys // Specify new game pad keys
async setKeys(keys) { setKeys(keys) {
// Error checking // Error checking
if (!Number.isSafeInteger(keys) || keys < 0 || keys > 0xFFFF) if (!Number.isSafeInteger(keys) || keys < 0 || keys > 0xFFFF)
@@ -487,7 +496,7 @@ class Sim extends HTMLElement {
this.#keys = keys; this.#keys = keys;
// Send the keys to the core // Send the keys to the core
await this.#core.toCore({ return this.#core.toCore({
command : "setKeys", command : "setKeys",
promised: true, promised: true,
sim : this.#pointer, sim : this.#pointer,
@@ -496,7 +505,7 @@ class Sim extends HTMLElement {
} }
// Specify audio panning // Specify audio panning
async setPanning(panning) { setPanning(panning) {
// Error checking // Error checking
if (!Number.isFinite(panning) ||panning < -1 || panning > +1) { if (!Number.isFinite(panning) ||panning < -1 || panning > +1) {
@@ -508,7 +517,7 @@ class Sim extends HTMLElement {
this.#panning = panning; this.#panning = panning;
// Send the panning to the core // Send the panning to the core
await this.#core.toCore({ return this.#core.toCore({
command : "setPanning", command : "setPanning",
promised: true, promised: true,
sim : this.#pointer, sim : this.#pointer,
@@ -529,7 +538,7 @@ class Sim extends HTMLElement {
} }
// Specify audio volume // Specify audio volume
async setVolume(volume) { setVolume(volume) {
// Error checking // Error checking
if (!Number.isFinite(volume) ||volume < 0 || volume > 10) { if (!Number.isFinite(volume) ||volume < 0 || volume > 10) {
@@ -541,7 +550,7 @@ class Sim extends HTMLElement {
this.#volume = volume; this.#volume = volume;
// Send the volume to the core // Send the volume to the core
await this.#core.toCore({ return this.#core.toCore({
command : "setVolume", command : "setVolume",
promised: true, promised: true,
sim : this.#pointer, sim : this.#pointer,
@@ -596,7 +605,7 @@ class VB {
#commands; // Computed method table #commands; // Computed method table
#core; // Core worker #core; // Core worker
#proxy; // Self proxy for sim access #proxy; // Self proxy for sim access
#sims; // All sims #sims; // Mapping of Sim|pointer -> proxy
#state; // Operations state #state; // Operations state
@@ -683,8 +692,8 @@ class VB {
///////////////////////////// Static Methods ////////////////////////////// ///////////////////////////// Static Methods //////////////////////////////
// Create a core instance // Create a core instance
static async create(options) { static create(options) {
return await new VB(GUARD).#construct(options); return new VB(GUARD).#construct(options);
} }
@@ -769,6 +778,16 @@ class VB {
/////////////////////////////// Properties ////////////////////////////////
// Number of managed simulations
get size() { return this.#sims.size / 2; }
// Managed simulations
get sims() { return [... this.#sims.keys()].filter(s=>s instanceof Sim); }
///////////////////////////// Public Methods ////////////////////////////// ///////////////////////////// Public Methods //////////////////////////////
// Create one or more sims // Create one or more sims
@@ -809,7 +828,7 @@ class VB {
if ( if (
!Array.isArray(sims) || !Array.isArray(sims) ||
sims.length == 0 || sims.length == 0 ||
sims.find(s=>!this.#sims.has(s)) sims.some(s=>!this.#sims.has(s))
) { ) {
throw new TypeError("Must specify a Sim or array of Sims " + throw new TypeError("Must specify a Sim or array of Sims " +
"that belong to this core."); "that belong to this core.");
@@ -864,6 +883,28 @@ class VB {
return true; return true;
} }
// Decode an ISX debugger file to a Virtual Boy ROM
async fromISX(data) {
// Validation
if (data instanceof ArrayBuffer)
data = new Uint8Array(data);
if (
!(data instanceof Uint8Array) &&
!(data instanceof Uint8ClampedArray)
) data = Uint8Array.from(data);
// Send the memory to the core
data = data.slice();
let response = await this.#toCore({
command : "fromISX",
promised : true,
data : data.buffer,
transfers: [ data.buffer ]
});
return response.data == null ? null : new Uint8Array(response.data);
}
// Suspend automatic emulation // Suspend automatic emulation
async suspend() { async suspend() {
@@ -932,4 +973,4 @@ class VB {
} }
export { VB }; export default VB;