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18
Commits
7e31fbd582
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155a3aa678
| Author | SHA1 | Date | |
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155a3aa678 | ||
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04e79c9151 | ||
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57dcd8370a | ||
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06849b54ba | ||
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eef255b507 | ||
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db966c8cb8 | ||
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b4feff41f0 | ||
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4449acada0 | ||
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799ac9f51a | ||
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b83b49221d | ||
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27e926bd58 | ||
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d802d39d8d | ||
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18b2c589e6 | ||
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f45636a491 | ||
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9ce8c9c778 | ||
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c90b8137de | ||
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bc864644f7 | ||
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e97b52e944 |
@@ -159,6 +159,8 @@ static void busRead(VB *sim, uint32_t address, int type, int32_t *value) {
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case 2: /* Misc. I/O */
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*value = busReadMisc(sim, address, type);
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if (type == VB_S8)
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*value = (int8_t) *value;
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break;
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case 3: break; /* Unmapped */
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+1
-5
@@ -91,11 +91,6 @@
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#define CPU_XORBSU 82
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#define CPU_XORNBSU 83
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/* Functional operand types */
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#define CPU_LITERAL 0
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#define CPU_MEMORY 1
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#define CPU_REGISTER 2
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/* Bit string operations */
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#define CPU_AND_BS 0
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#define CPU_ANDN_BS 1
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@@ -1642,6 +1637,7 @@ static void cpuSUBF_S(VB *sim) {
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/* TRAP */
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static void cpuTRAP(VB *sim) {
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sim->cpu.clocks += cpuClocks(15);
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sim->cpu.pc += 2;
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cpuThrow(sim, 0xFFA0 + cpuGetImm5U(sim));
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}
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+39
-12
@@ -5,6 +5,15 @@
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/***************************** Module Functions ******************************/
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/* Compute clocks until the next decrement to zero */
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static uint32_t tmrGetUntil(VB *sim) {
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uint32_t fullTick = sim->tmr.t_clk_sel ? 400 : 2000;
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uint32_t thisTick = sim->tmr.clocks +
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(sim->tmr.t_clk_sel ? 0 : 400 * (4 - sim->tmr.tick20));
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return thisTick + fullTick *
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(sim->tmr.counter == 0 ? sim->tmr.reload : sim->tmr.counter - 1);
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}
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/* Update the counter to a new value */
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static void tmrUpdate(VB *sim, uint16_t value) {
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if (value == 0 && sim->tmr.counter != 0) {
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@@ -23,10 +32,6 @@ static void tmrUpdate(VB *sim, uint16_t value) {
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/* Process component */
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static void tmrEmulate(VB *sim, uint32_t clocks) {
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/* Timer is disabled */
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if (!sim->tmr.t_enb)
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return;
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/* Process all clocks */
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for (;;) {
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@@ -40,13 +45,20 @@ static void tmrEmulate(VB *sim, uint32_t clocks) {
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/* Advance forward the component's number of clocks */
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clocks -= sim->tmr.clocks;
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sim->tmr.until -= sim->tmr.clocks;
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sim->tmr.clocks = sim->tmr.t_clk_sel ? 400 : 2000;
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sim->tmr.clocks = 400;
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sim->tmr.tick20 += sim->tmr.tick20 == 4 ? -4 : 1;
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/* Do not decrement counter */
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if (
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!sim->tmr.t_enb ||
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(!sim->tmr.t_clk_sel && sim->tmr.tick20 != 0)
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) continue;
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/* Advance to the next counter value */
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tmrUpdate(sim, sim->tmr.counter == 0 ?
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sim->tmr.reload : sim->tmr.counter - 1);
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if (sim->tmr.counter == 0)
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sim->tmr.until = sim->tmr.clocks * ((uint32_t)sim->tmr.reload + 1);
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sim->tmr.until = tmrGetUntil(sim);
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}
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}
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@@ -71,8 +83,10 @@ static void tmrReset(VB *sim) {
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sim->tmr.z_stat = 0;
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/* Other */
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sim->tmr.clocks = 400;
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sim->tmr.counter = 0xFFFF;
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sim->tmr.reload = 0x0000;
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sim->tmr.tick20 = 0;
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}
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/* Determine how many clocks are guaranteed to process */
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@@ -88,14 +102,27 @@ static void tmrWriteControl(VB *sim, uint8_t value) {
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if (
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(value & 0x04) && /* Z-Stat-Clr */
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(
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sim->tmr.counter != 0 ||
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!sim->tmr.t_enb
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!sim->tmr.t_enb ||
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(
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sim->tmr.counter != 0 &&
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!(value & 0x01) /* T-Enb */
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)
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)
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) {
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sim->tmr.z_stat = sim->tmr.counter != 0;
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sim->cpu.irq &= ~0x0002;
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}
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/* Hardware bug: decrement on switch to 20us mode */
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if (
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!sim->tmr.t_clk_sel &&
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(value & 0x10) && /* T-Clk-Sel */
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sim->tmr.tick20 != 0
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) {
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tmrUpdate(sim, sim->tmr.counter == 0 ?
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sim->tmr.reload : sim->tmr.counter - 1);
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}
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/* Parse fields */
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sim->tmr.t_clk_sel = value >> 4 & 1;
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sim->tmr.tim_z_int = value >> 3 & 1;
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@@ -105,10 +132,8 @@ static void tmrWriteControl(VB *sim, uint8_t value) {
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if (!sim->tmr.tim_z_int)
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sim->cpu.irq &= ~0x0002;
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/* Configure countdowns */
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sim->tmr.clocks = sim->tmr.t_clk_sel ? 400 : 2000;
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sim->tmr.until = sim->tmr.clocks * (sim->tmr.counter == 0 ?
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(uint32_t) sim->tmr.reload + 1 : sim->tmr.counter);
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/* Configure state */
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sim->tmr.until = tmrGetUntil(sim);
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/* TODO: Will Z-Stat raise an interrupt when Tim-Z-Int is set? */
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}
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@@ -117,12 +142,14 @@ static void tmrWriteControl(VB *sim, uint8_t value) {
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static void tmrWriteHigh(VB *sim, uint8_t value) {
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sim->tmr.reload = (uint16_t) value << 8 | (sim->tmr.reload & 0x00FF);
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tmrUpdate(sim, sim->tmr.reload);
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sim->tmr.until = tmrGetUntil(sim);
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}
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/* Write to the low data register */
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static void tmrWriteLow(VB *sim, uint8_t value) {
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sim->tmr.reload = (sim->tmr.reload & 0xFF00) | value;
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tmrUpdate(sim, sim->tmr.reload);
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sim->tmr.until = tmrGetUntil(sim);
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}
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@@ -8,8 +8,11 @@
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/*********************************** Types ***********************************/
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/* Output image */
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typedef uint8_t Pixels[2][384*224];
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/* VIP BG map cell */
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typedef struct {
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uint8_t *palette; /* Points to a VB.vip.gplt */
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uint8_t *pixels; /* Points to a VB.vip.characters */
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} Cell;
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/* VSU channel */
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typedef struct {
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@@ -64,9 +67,58 @@ typedef struct {
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} wave;
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/* Other state */
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uint32_t clocks; /* Clocks until next sample */
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uint32_t clocks; /* Clocks until next wave or noise sample */
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uint8_t freqmod; /* Frequency modifications are active */
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uint32_t until; /* Clocks until channel component update */
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} Channel;
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/* VIP character (hflp << 1 | vflp) */
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typedef uint8_t Character[4][64];
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/* VIP object */
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typedef struct {
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Cell cell; /* BG map-like attributes */
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int16_t jp; /* Parallax */
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int16_t jx; /* Screen base X */
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int16_t jy; /* Screen Y */
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uint8_t lron; /* Visible in left and right images */
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} Object;
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/* Output image */
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typedef uint8_t Pixels[2][384*224];
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/* VIP world */
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typedef struct {
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/* Attributes */
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uint8_t bgm; /* Mode */
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uint8_t end; /* Control world */
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int16_t gp; /* World parallax */
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int16_t gx; /* World base X */
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int16_t gy; /* World Y */
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int16_t mx; /* Scroll base X */
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int16_t mp; /* Scroll parallax */
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int16_t my; /* Scroll Y */
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uint8_t over; /* Use overplane */
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Cell *overplane; /* Overplane cell */
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/* Non-attributes */
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Cell *bg[64]; /* Background arrangement */
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int32_t bgHeight; /* Height of background in pixels */
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uint32_t bgMaskX; /* Horizontal background mask */
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uint32_t bgMaskY; /* Vertical background mask */
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uint32_t bgShift; /* Bits to shift when selecting a BG map */
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int32_t bgWidth; /* Width of background in pixels */
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uint32_t hAffine; /* H for affine mode */
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uint32_t hNaffine; /* H for not affine mode */
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uint32_t height; /* Height of world in pixels */
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uint8_t lron; /* Visible in left and right images */
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uint32_t paramBase; /* H-bias and affine parameter address */
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uint32_t wAffine; /* W for affine mode */
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uint32_t wNaffine; /* W for not affine mode */
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uint32_t width; /* Width of world in pixels */
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} World;
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/* Simulation state */
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struct VB {
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@@ -199,6 +251,7 @@ struct VB {
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uint32_t clocks; /* Master clocks to wait */
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uint16_t counter; /* Current counter value */
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uint16_t reload; /* Reload counter value */
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uint8_t tick20; /* Current 20-microsecond tick */
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uint32_t until; /* Clocks until interrupt condition */
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} tmr;
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@@ -259,6 +312,7 @@ struct VB {
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int frame; /* FRMCYC counter */
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int32_t halfword; /* Current output halfword offset */
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int step; /* Processing phase */
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uint8_t toggle; /* Switch frame buffers next frame */
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uint32_t until; /* Clocks until interrupt condition */
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} xp;
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@@ -273,12 +327,17 @@ struct VB {
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uint16_t spt[4]; /* Object control */
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/* Rendering shadow memory */
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uint8_t buffer; /* Output buffer */
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uint16_t halfwords[384*28]; /* Output timing by 1x8 halfword */
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Pixels output[2]; /* Output images, row-major */
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Pixels shadow; /* Drawing shadow image, column-major */
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/* Other state */
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Cell cells[0x10000]; /* Pre-computed BG map attributes */
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Character characters[2048]; /* Pre-computed character pixels */
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Object objects[1024]; /* Pre-computed object attributes */
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uint8_t ram[0x40000]; /* Video memory */
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World worlds[32]; /* Pre-computed world attributes */
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} vip;
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/* VSU */
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@@ -575,7 +634,7 @@ VBAPI void vbGetPixels(VB *sim, void *left, int leftStrideX, int leftStrideY,
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continue;
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/* Transfer pixels to the destination */
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src = sim->vip.output[sim->vip.dp.buffer ^ 1][i];
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src = sim->vip.output[sim->vip.buffer][i];
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for (y = 0; y < 224; y++, dest += yStride)
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for (x = offset = 0; x < 384; x++, offset += xStride)
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dest[offset] = *src++;
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@@ -643,6 +702,7 @@ VBAPI vbOnWrite vbGetWriteCallback(VB *sim) {
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VBAPI VB* vbInit(VB *sim) {
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sim->cart.ram = NULL;
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sim->cart.rom = NULL;
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sim->ph.enabled = 0;
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sim->vsu.out.samples = NULL;
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sim->onExecute = NULL;
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sim->onFetch = NULL;
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@@ -652,7 +712,7 @@ VBAPI VB* vbInit(VB *sim) {
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sim->onSamples = NULL;
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sim->onWrite = NULL;
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sim->peer = NULL;
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sim->ph.enabled = 0;
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sim->tag = NULL;
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vbReset(sim);
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return sim;
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}
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@@ -774,6 +834,8 @@ VBAPI int vbSetOption(VB *sim, int key, int value) {
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VBAPI void vbSetPeer(VB *sim, VB *peer) {
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if (sim->peer == peer)
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return;
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if (sim->peer != NULL)
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sim->peer->peer = NULL;
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sim->peer = peer;
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if (peer == NULL)
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return;
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@@ -784,6 +846,7 @@ VBAPI void vbSetPeer(VB *sim, VB *peer) {
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/* Specify a new value for the program counter */
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VBAPI uint32_t vbSetProgramCounter(VB *sim, uint32_t value) {
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sim->cpu.clocks = 0;
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sim->cpu.operation = CPU_FETCH;
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sim->cpu.pc = sim->cpu.nextPC = value & 0xFFFFFFFE;
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sim->cpu.step = 0;
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@@ -126,7 +126,6 @@ typedef int (*vbOnWrite )(VB *sim, uint32_t address, int type, int32_t *valu
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VBAPI int vbEmulate (VB *sim, uint32_t *clocks);
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VBAPI int vbEmulateEx (VB **sims, unsigned count, uint32_t *clocks);
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VBAPI void* vbGetCallback (VB *sim, int id);
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VBAPI void* vbGetCartRAM (VB *sim, uint32_t *size);
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VBAPI void* vbGetCartROM (VB *sim, uint32_t *size);
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VBAPI vbOnException vbGetExceptionCallback(VB *sim);
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+611
-328
File diff suppressed because it is too large
Load Diff
+57
-50
@@ -74,49 +74,8 @@ static void vsuNextFreqMod(VB *sim, Channel *chan) {
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}
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/* Process one channel */
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static void vsuEmulateChannel(VB *sim, int index, uint32_t clocks) {
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static void vsuEmulateChannel(VB *sim, Channel *chan) {
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uint32_t bit; /* Pseudorandom bit */
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Channel *chan; /* Channel handle */
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int freqmod; /* Frequency modifications enabled */
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uint32_t until; /* Clocks to process sub-channel components */
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/* Select channel */
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chan = &sim->vsu.channels[index];
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/* Channel is disabled */
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if (!chan->int_.enb)
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return;
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/* Frequency modifications are active */
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freqmod =
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index == 4 && /* Channel 5 */
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sim->vsu.freqmod.enb && /* Modifications enabled */
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sim->vsu.freqmod.interval != 0 /* Modifications valid */
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;
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/* Process all clocks */
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do {
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/* Clocks until next state change */
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until = clocks;
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if (chan->clocks < until)
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until = chan->clocks;
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if (chan->env.enb && chan->env.clocks < until)
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until = chan->env.clocks;
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if (chan->int_.auto_ && chan->int_.clocks < until)
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until = chan->int_.clocks;
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if (freqmod && sim->vsu.freqmod.clocks < until)
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until = sim->vsu.freqmod.clocks;
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/* Manage clocks */
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clocks -= until;
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chan->clocks -= until;
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if (chan->env.enb)
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chan->env.clocks -= until;
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if (chan->int_.auto_)
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chan->int_.clocks -= until;
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if (freqmod)
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sim->vsu.freqmod.clocks -= until;
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/* Automatic shutoff */
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if (chan->int_.auto_ && chan->int_.clocks == 0) {
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@@ -124,11 +83,11 @@ static void vsuEmulateChannel(VB *sim, int index, uint32_t clocks) {
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return;
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}
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/* Next sample */
|
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/* Next input sample */
|
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if (chan->clocks == 0) {
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|
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/* Wave */
|
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if (index != 5) {
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if (chan != &sim->vsu.channels[5]) {
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chan->clocks = 4 * (2048 - (uint32_t) chan->freq.current);
|
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chan->wave.sample = (chan->wave.sample + 1) & 31;
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}
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@@ -158,7 +117,7 @@ static void vsuEmulateChannel(VB *sim, int index, uint32_t clocks) {
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}
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/* Frequency modification */
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if (freqmod && sim->vsu.freqmod.clocks == 0) {
|
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if (chan->freqmod && sim->vsu.freqmod.clocks == 0) {
|
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chan->freq.current = sim->vsu.freqmod.next;
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vsuNextFreqMod(sim, chan);
|
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if (!chan->int_.enb)
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@@ -167,8 +126,6 @@ static void vsuEmulateChannel(VB *sim, int index, uint32_t clocks) {
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(sim->vsu.freqmod.clk == 0 ? 19200 : 153600);
|
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}
|
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} while (clocks != 0);
|
||||
|
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}
|
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|
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/* Produce output for a channel */
|
||||
@@ -230,6 +187,8 @@ static void vsuWriteEV1(VB *sim, int index, uint8_t value) {
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sim->vsu.freqmod.func = value >> 4 & 1;
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sim->vsu.freqmod.rep = value >> 5 & 1;
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vsuNextFreqMod(sim, chan);
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chan->freqmod =
|
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sim->vsu.freqmod.enb && sim->vsu.freqmod.interval != 0;
|
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break;
|
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case 5: /* Channel 6 */
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||||
@@ -313,6 +272,8 @@ static void vsuWriteSWP(VB *sim, uint8_t value) {
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(sim->vsu.freqmod.clk == 0 ? 19200 : 153600);
|
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if (clocks < sim->vsu.freqmod.clocks)
|
||||
sim->vsu.freqmod.clocks = clocks;
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||||
sim->vsu.channels[4].freqmod =
|
||||
sim->vsu.freqmod.enb && sim->vsu.freqmod.interval != 0;
|
||||
}
|
||||
|
||||
|
||||
@@ -321,6 +282,8 @@ static void vsuWriteSWP(VB *sim, uint8_t value) {
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||||
|
||||
/* Process component */
|
||||
static void vsuEmulate(VB *sim, uint32_t clocks) {
|
||||
Channel *chan; /* Input channel */
|
||||
uint32_t chantil; /* Clocks until next channel state update */
|
||||
float i0; /* Current analog input sample */
|
||||
float o0; /* Current analog output sample */
|
||||
uint16_t output[2]; /* Digital output samples */
|
||||
@@ -340,12 +303,54 @@ static void vsuEmulate(VB *sim, uint32_t clocks) {
|
||||
sim->vsu.clocks -= until;
|
||||
|
||||
/* Process all channels */
|
||||
for (x = 0; x < 6; x++)
|
||||
vsuEmulateChannel(sim, x, until);
|
||||
for (x = 0; x < 6; x++) {
|
||||
chan = &sim->vsu.channels[x];
|
||||
chantil = until;
|
||||
|
||||
/* Process all clocks */
|
||||
while (chan->int_.enb && chantil != 0) {
|
||||
|
||||
/* Determine when the next state change will occur */
|
||||
if (chan->until == 0) {
|
||||
|
||||
/* Clocks until next state change */
|
||||
chan->until = chan->clocks;
|
||||
if (chan->env.enb && chan->env.clocks < chan->until)
|
||||
chan->until = chan->env.clocks;
|
||||
if (chan->int_.auto_ && chan->int_.clocks < chan->until)
|
||||
chan->until = chan->int_.clocks;
|
||||
if (chan->freqmod && sim->vsu.freqmod.clocks < chan->until)
|
||||
chan->until = sim->vsu.freqmod.clocks;
|
||||
|
||||
/* Manage clocks */
|
||||
chan->clocks -= chan->until;
|
||||
if (chan->env.enb)
|
||||
chan->env.clocks -= chan->until;
|
||||
if (chan->int_.auto_)
|
||||
chan->int_.clocks -= chan->until;
|
||||
if (chan->freqmod)
|
||||
sim->vsu.freqmod.clocks -= chan->until;
|
||||
}
|
||||
|
||||
/* Manage clocks */
|
||||
if (chan->until > chantil) {
|
||||
chan->until -= chantil;
|
||||
chantil = 0;
|
||||
} else {
|
||||
chantil -= chan->until;
|
||||
chan->until = 0;
|
||||
}
|
||||
|
||||
/* Update channel state */
|
||||
if (chan->until == 0)
|
||||
vsuEmulateChannel(sim, chan);
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/* Wait for the current sample to finish */
|
||||
if (sim->vsu.clocks != 0)
|
||||
continue;
|
||||
return;
|
||||
|
||||
/* Compute the output sample */
|
||||
output[0] = output[1] = 0;
|
||||
@@ -416,6 +421,8 @@ static void vsuReset(VB *sim) {
|
||||
for (x = 0; x < 6; x++) {
|
||||
chan = &sim->vsu.channels[x];
|
||||
chan->clocks = 0;
|
||||
chan->freqmod = 0;
|
||||
chan->until = 0;
|
||||
chan->env.clocks = 0;
|
||||
chan->env.enb = 0;
|
||||
chan->env.dir = 0;
|
||||
|
||||
+8
-10
@@ -1,4 +1,4 @@
|
||||
/* This file is included into vb.c and cannot be compiled on its own. */
|
||||
/* This file is included into vbu.c and cannot be compiled on its own. */
|
||||
#ifdef VBUAPI
|
||||
|
||||
|
||||
@@ -449,12 +449,6 @@ static VBU_DasmLine* dasmGrow(
|
||||
return *lines == NULL ? NULL : &(*lines)[index];
|
||||
}
|
||||
|
||||
/* Determine the size of an instruction */
|
||||
static uint32_t dasmInstSize(VB *sim, uint32_t address) {
|
||||
unsigned opcode = vbRead(sim, address, VB_U16) >> 10 & 63;
|
||||
return opcode < 0x20 || opcode == 0x32 || opcode == 0x36 ? 2 : 4;
|
||||
}
|
||||
|
||||
/* Format an operand */
|
||||
static void dasmOperand(char *dest, VBU_DasmConfig *config,
|
||||
VBU_DasmLine *line, uint8_t type) {
|
||||
@@ -515,10 +509,12 @@ static int dasmLine(VB *sim, uint32_t *address, uint32_t pc,
|
||||
/* Process non-text members */
|
||||
line = &(*lines)[index];
|
||||
line->address = *address;
|
||||
line->codeLength = dasmInstSize(sim, *address);
|
||||
line->codeLength = vbuCodeSize(sim, *address);
|
||||
line->isPC = *address == pc;
|
||||
for (x = 0; x < line->codeLength; x++)
|
||||
line->code[x] = vbRead(sim, *address + x, VB_U8);
|
||||
|
||||
/* Advance to the next instruction or PC, whichever is sooner */
|
||||
*address += pc != *address && pc - *address < line->codeLength ?
|
||||
pc - *address : line->codeLength;
|
||||
|
||||
@@ -660,9 +656,11 @@ static VBU_DasmLine* dasmDisassemble(VB *sim, uint32_t address,
|
||||
}
|
||||
|
||||
/* Check if the instruction contains the reference address */
|
||||
size = dasmInstSize(sim, addr);
|
||||
size = vbuCodeSize(sim, addr);
|
||||
if (address - addr < size)
|
||||
break;
|
||||
|
||||
/* Advance to the next instruction or PC, whichever is sooner */
|
||||
addr += addr != pc && pc - addr < size ? pc - addr : size;
|
||||
}
|
||||
|
||||
@@ -674,7 +672,7 @@ static VBU_DasmLine* dasmDisassemble(VB *sim, uint32_t address,
|
||||
|
||||
/* Keep decoding until the first line of output */
|
||||
else for (; line < 0; line++)
|
||||
addr += dasmInstSize(sim, addr);
|
||||
addr += vbuCodeSize(sim, addr);
|
||||
|
||||
/* Working variables */
|
||||
size = length * sizeof (VBU_DasmLine);
|
||||
|
||||
@@ -38,6 +38,12 @@ static int32_t SignExtend(int32_t value, int32_t bits) {
|
||||
|
||||
/******************************* API Commands ********************************/
|
||||
|
||||
/* Determine the size in bytes of an instruction */
|
||||
VBUAPI int vbuCodeSize(VB *sim, uint32_t address) {
|
||||
int opcode = vbRead(sim, address, VB_U16) >> 10 & 63;
|
||||
return opcode < 0x20 || opcode == 0x32 || opcode == 0x36 ? 2 : 4;
|
||||
}
|
||||
|
||||
/* Initialize disassembler options with default settings */
|
||||
VBUAPI VBU_DasmConfig* vbuDasmInit(VBU_DasmConfig *config) {
|
||||
config->bcondNotation = VBU_JOINED;
|
||||
|
||||
@@ -85,6 +85,7 @@ typedef struct {
|
||||
|
||||
/******************************* API Commands ********************************/
|
||||
|
||||
VBUAPI int vbuCodeSize (VB *sim, uint32_t address);
|
||||
VBUAPI VBU_DasmConfig* vbuDasmInit (VBU_DasmConfig *config);
|
||||
VBUAPI VBU_DasmLine* vbuDisassemble(VB *sim, uint32_t address, VBU_DasmConfig *config, unsigned length, int line);
|
||||
|
||||
|
||||
+12
-5
@@ -87,10 +87,7 @@ new class Core {
|
||||
this.sims.set(sim.pointer, sim);
|
||||
|
||||
// Video
|
||||
sim.pixels = this.#noalloc(
|
||||
this.GetExtPixels(sim.pointer),
|
||||
384*224*4, sim, "pixels", Uint8ClampedArray
|
||||
);
|
||||
sim.pixels = this.#getPixels(sim);
|
||||
sim.image = new ImageData(sim.pixels, 384, 224);
|
||||
|
||||
// Audio
|
||||
@@ -364,9 +361,11 @@ new class Core {
|
||||
this.mallocs.set(buffer.pointer, buffer);
|
||||
this.#updateTarget(buffer);
|
||||
}
|
||||
for (let sim of this.sims)
|
||||
for (let sim of this.sims.values()) {
|
||||
sim.pixels = this.#getPixels(sim);
|
||||
sim.image = new ImageData(sim.pixels, 384, 224);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
@@ -436,6 +435,14 @@ new class Core {
|
||||
this.Realloc(buffer.pointer, 0);
|
||||
}
|
||||
|
||||
// Register a sim's pixel buffer
|
||||
#getPixels(sim) {
|
||||
return this.#noalloc(
|
||||
this.GetExtPixels(sim.pointer),
|
||||
384*224*4, sim, "pixels", Uint8ClampedArray
|
||||
);
|
||||
}
|
||||
|
||||
// Allocate memory in WebAssembly and register the buffer
|
||||
#malloc(count, target = null, assign = null, type = Uint8ClampedArray) {
|
||||
return this.#noalloc(
|
||||
|
||||
Reference in New Issue
Block a user